HiRel FPGAs
Fixed Capacitance Values for
Actel FPGAs (pF)
Fixed Clock Loads (s1/s2—ACT 3 Only)
s1
s2
r1
r2
Clock Loads on
Dedicated
Array Clock
Clock Loads on
Dedicated
I/O Clock
Device Type
A1010B
routed_Clk1
routed_Clk2
Device Type
A1425A
41
n/a
n/a
134
168
168
75
160
432
697
100
168
228
A1020B
69
A1460A
A1240A
134
168
168
75
A14100A
A1280A
A1280XL
A1425A
Determining Average Switching Frequency
To determine the switching frequency for a design, you must
have a detailed understanding of the data values input to the
circuit. The guidelines in the table below are meant to
represent worst-case scenarios so that they can be generally
used to predict the upper limits of power dissipation.
A1460A
165
195
178
230
165
195
178
230
A14100A
A32100DX
A32200DX
Type
ACT 3
3200DX/ACT 2/1200XL
ACT 1
Logic modules (m)
Input switching (n)
Outputs switching (p)
80% of modules
80% of modules
# inputs/4
90% of modules
# inputs/4
# inputs/4
#outputs/4
#outputs/4
#outputs/4
First routed array clock loads (q1)
40% of sequential
modules
40% of sequential
modules
40% of modules
Second routed array clock loads (q2)
40% of sequential
modules
40% of sequential
modules
n/a
Load capacitance (CL)
35 pF
F/10
F/5
F/10
F/2
F/2
F
35 pF
F/10
F/5
35 pF
F/10
F/5
Average logic module switching rate (fm)
Average input switching rate (fn)
Average output switching rate (fp)
Average first routed array clock rate (fq1)
Average second routed array clock rate (fq2
F/10
F
F/10
F
)
F/2
n/a
Average dedicated array clock rate (fs1
)
n/a
n/a
Average dedicated I/O clock rate (fs2)
F
n/a
n/a
13