MIL-PRF-38535K
o. Assembly rework procedure.
p. Die attach procedures.
q. Wire/ribbon bonding.
r. Device traceability and travelers.
s. Lot formation (wafer, device and inspection).
t. Assembly area environmental control.
u. Internal moisture vapor control program.
v. Electrostatic discharge (ESD) control and testing.
w. Visual inspection.
x. Human contamination prevention procedures.
y. Equipment calibration and maintenance.
z. Training policy and procedures.
aa. Electrical test procedures.
bb. Screening procedure.
cc. TCI procedures.
dd. Third party design center procedures.
ee. Change control procedure.
ff.
Chip encapsulation/molding.
gg. Qualification test plan.
hh. Characterization procedures.
ii.
jj.
Selection of suppliers.
New technology/materials evaluation.
kk. Package integrity demonstration test plan (PIDTP).
3.4.1.4.1 Package design selection reviews. The manufacturer shall establish and implement systematic package design
or selection reviews to ascertain compatibility of chip(s) and packages with respect to thermal, electrical and mechanical
performance and manufacturing, testing, and reliability requirements. Manufacturer’s package element material and finish
shall be in accordance with A.3.5.6 unless otherwise specified in the manufacturer’s QM plan.
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