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5962-0421901QYC 参数 Datasheet PDF下载

5962-0421901QYC图片预览
型号: 5962-0421901QYC
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 250000 Gates, 4224-Cell, CMOS, CQFP208, CERAMIC, QFP-208]
分类和应用: 可编程逻辑
文件页数/大小: 217 页 / 1554 K
品牌: ACTEL [ Actel Corporation ]
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MIL-PRF-38535K  
3.4.1 QML certification requirements. The manufacturers shall meet the minimum procedures and requirements in this  
section for QML certification of a manufacturing line. The QA shall determine adequacy and compliance to the requirements  
as specified herein and shall report their findings and recommendations in writing to the manufacturer's TRB. Each portion of  
a QML microcircuit manufacturer's line capability, including any offshore operations, may be demonstrated independently, but  
validation by the QA shall assess a complete technology flow. To maintain certification the manufacturer shall provide  
notification of change to the process baseline to the QA. For generic qualification procedures, certification shall consist of:  
a. QM program documentation (see G.3.1).  
b. Process capability demonstration for certification (see 3.4.1.1 and H.3.2).  
c. QA management and technology validation (see 3.4.1.2).  
d. All procedures used to manufacture masks for monolithic fabrication (see appendix H).  
3.4.1.1 Process capability demonstration. As part of certification, the manufacturer shall build devices, perform tests and  
run software benchmarks necessary to demonstrate that the manufacturer has a comprehension of the capability of the  
manufacturing process as related to quality, reliability and producibility. The summary of the results of all of these tests shall  
be available for review by the QA (prior to scheduling a validation review). These tests shall be designed to be used as a  
continual check of the process capability as well as an initial demonstration of such capability. The TRB shall determine when  
such tests are to be performed after initial certification.  
Process capability demonstration shall consist of:  
a. Design.  
(1) Circuit.  
(2) Package.  
b. Wafer fabrication.  
c. Statistical process control (SPC) and in-process monitoring programs including the technology characterization  
vehicle (TCV) program, the SEC, and parametric monitors (PMs) (see appendix H).  
d. Wafer acceptance plan.  
e. Assembly and packaging.  
f. RHA (see appendix C).  
g. Testing (Wafer and Packaged level, as applicable).  
3.4.1.1.1 New technology insertion. The supplier shall establish a new technology insertion program for the identification,  
management, and tracking of new technology. The program shall include a plan that defines the new technology, and the  
criteria and methodology for characterization and qualification of new technology. It shall also include the specific details of  
determining the potential failure mechanisms and activation energies and their respective mitigation strategies. The new  
technology insertion program, plan and methods shall be reviewed by the qualifying activity.  
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