TABLE I. Electrical performance characteristics. – Continued.
1/ AC/Timing parameters (subgroup 9, 10, 11) are not directly tested but fully characterized (see note 2/), which are published
on device manufacturer’s data sheet and implemented in manufacturer’s software (see 6.7 and Table IIA note 8/ herein).
2/ Characterization data is taken at initial device introduction and repeated after any design or process changes that may
affect the related parameters. Devices are first 100 percent functionally tested, then benchmark design/timing patterns are
programmed into the devices and then characterized to determine the compliance of the parameters.
3/ All tests shall be performed under the worst-case condition unless otherwise specified.
4/ Devices are functionally tested using a serial scan test method. Data is shifted into the TDI pin and the TCK pin is used as
a clock. The data is used to drive the inputs of the internal logic and I/O modules, allowing a complete functional test to be
performed. The outputs of the module can be read by shifting out the output response or by monitoring the TDO pins.
5/ This device is electrically compliant with the PCI Local Bus Specification Rev. 2.1, it supports both 33 MHz and 66 MHz PCI
bus applications.
6/ 5V direct input tolerance is allowed only for 3.3 V PCI and for 3.3V LVTTL with clamp diode enabled. Clamp diode is only
enabled by default for 3.3V PCI standard; for 3.3V LVTTL, it can be enabled through checking the settings in manufacturer’s
Designer software. Hot-insertion and cold-sparing are not supported when clamp diode is enabled.
Example: The PCI standard provides an internal clamp diode between the input pad and the VCCI pad (see graph below) so
the voltage at the input pin is clamped below the absolute maximum input voltage of 4.1 V (see 1.3 above). An example of
the input pad voltage level is shown as: VINPUT = VCCI + VDIODE = 3.3 V + 0.7 V = 4.0 V.
The internal clamp diode is only enabled while the device is powered on, so the voltage at the input will not be clamped if
the VCCI is powered off. An external series resistor (~100 Ω) is required between the input pin and the 5 V signal source to
limit the current to less than 20 mA. The 100 Ω resistor is chosen to meet the maximum I/O input rise and fall time (Tr/Tf)
requirement of 50 ns. 5 V tolerance is not allowable for VCCI greater than 3.3 V or for input signals greater than 5.0 V.
SIZE
STANDARD
5962-04221
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
SHEET
C
16
DSCC FORM 2234
APR 97
ACTEL [ Actel Corporation ]
