W89C840F
13
R/W
TXON
Transmit On.
When set, t he t r ansmi ssi on pr ocess st ar t s (leave the Idle
state, at first, and fetch the transmission descriptor according to the
configuration of C10/CTDLA ).
When reset, the transmi ssi on st at e machi ne st ops after the
current frame is completed (transmitted successfully or transmission
abort with excessive collision).
The register C10/CTDLA must be programmed before setting
TXON high.
12
R
---
Reserved. Fixed at 0.
11:10
R/W
LBK
Loopback Mode.
The LBK selects the W89C840F loop-back modes:
LBK[11:10]
Loop-back Mode
-----------------------
Normal mode
---------------
00
01
10
Internal Loop-back
External Loop-back
9
R/W
FD
Full Duplex Mode.
When set, the W89C840F will perform the full duplex function.
When reset, the W89C840F works in half duplex mode. In full
duplex mode, the W89C840F can transmit and receive packets at
the same time. In half duplex mode, the W89C840F can only
exclusively either transmit or receive. W89C840F is not allowed to
be programmed in internal loop-back mode when it is in full duplex
mode.
To change this mode setting, be sure W89C840F is completely idle
and the Receive On bit (RXON) and the Transmit On bit (TXON)
are both reset.
8
7
R
---
Reserved. Fixed at 0.
Accept Error Packet.
R/W
AEP
When set, all incoming packets passed address filtering i s
accepted, including runt packets, CRC error packets, and dribbling
bit error packets. When reset, only the valid incoming packets ar e
accepted. Default 0.
6
R/W
ARP
Accept Runt Packet.
When set, the incoming packets pass the address filtering with the
length less than 64 bytes are accepted. When reset, the incoming
packets pass the address filtering with the length less than 64 bytes
are rejected. Default 0.
Publication Release Date:April 1997
- 43 -
Revision A1
ETC [ ETC ]
