VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
2.Truth Table
2.1 Command Truth Table
CKE
n-1
A9-
A0
FUNCTION
Symbol
CS
RAS CAS WE
A11
A10
n
X
X
X
X
X
X
X
X
X
X
X
Device deselect
No operation
DESL
NOP
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
X
H
L
X
H
L
X
H
L
X
X
X
X
X
X
Mode register set
Bank activate
MRS
L
L
V
BS(2)
BS(2)
BS(2)
BS(2)
BS(2)
BS(2)
X
ACT
L
H
L
H
H
H
L
Row
L
Row
Col(1)
Col(1)
Col(1)
Col(1)
X
Read
READ
READA
WRIT
WRITA
PRE
H
H
H
H
L
Read with auto precharge
Write
L
H
L
L
Write with auto precharge
Precharge select bank
Precharge all banks
Burst stop
L
L
H
H
H
H
L
L
PALL
BST
L
L
H
X
H
L
X
X
X
Note: (1) Column address: A0~A7
(2) BS: Bank Select. L means Bank A and H means Bank B.
2.2 DQM Truth Table
CKE
DQM
FUNCTION
Data write/output enable
Symbol
n-1
H
n-1
UDQM
LDQM
ENB
MASK
ENBU
ENBL
X
X
X
X
X
X
L
Data mask/output disable
H
H
Upper byte write enable/output enable
Lower byte write enable/output enable
Upper byte write inhibit/output disable
Lower byte inhibit/output disable
H
L
X
L
H
X
H
X
MASKU
MASKL
H
X
H
H
2.3 CKE Truth Table
CKE
n-1
Add-
ress
Current State
Function
Symbol
CS RAS CAS
WE
n
L
Activating
Any
Clock suspend mode entry
Clock suspend
H
L
X
X
X
L
X
X
X
L
X
X
X
L
X
X
X
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
Clock suspend
Idle
Clock suspend mode exit
CBR refresh command
Self refresh entry
L
H
H
L
REF
H
H
L
Idle
SELF
L
L
L
Self refresh
Self refresh exit
H
H
L
L
H
X
X
X
H
X
X
X
L
H
X
X
Idle
Power down entry
Power down exit
H
L
Power down
H
H : High level, L : Low level, X : high or Low level(Don’t care), V : Valid Data input
Document:1G5-0189
Rev.1
Page9
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
