73S8004R
Low Cost Smart Card Interface
OFF AND FAULT DETECTION
There are two different cases that the system controller can monitor the OFF signal: to query regarding the card
presence outside card sessions, or for fault detection during card sessions.
Outside a card session: In this condition, CMDVCC is always high, OFF is low if the card is not present, and high
if the card is present. Because it is outside a card session, any fault detection will not act upon the OFF signal. No
deactivation is required during this time.
During a card session: CMDVCC is always low, and OFF falls low if the card is extracted or if any fault detection
is detected. At the same time that OFF is asserted low, the sequencer starts the deactivation process.
The Figure 5 shows the timing diagram for the signals CMDVCC, PRES, and OFF during a card session and
outside the card session:
OFFis lowby
card extracted
OFF is lowby
any fault
PRES
OFF
CMDVCC
VCC
outside card session
within card session
within card
session
Figure 5: Timing Diagram - Management of the Interrupt Line OFF
I/O CIRCUITRY AND TIMING
The state of the I/O, AUX1, and AUX2 pins is in low state after power on reset and they are in high state when the
activation sequencer turns on the I/O reception state. See Activation Sequence timing section for more details on
when the I/O reception is on. The state of the I/OUC, AUX1UC, and AUX2UC is high after power on reset.
Within a card session and when the I/O reception state is turn on, the first I/O line on which a falling edge is
detected becomes the input I/O line and the other becomes the output I/O line. When the input I/O line rising edge
is detected then both I/O lines return to their neutral state.
The Figure 6 shows the state diagram of how the I/O and I/OUC lines are managed to become input or output.
The delay between the I/O signals is shown in Figure 7.
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© 2002-2003 TDK Semiconductor Corporation
Proprietary and Confidential
Rev 1.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
