W311
2. All unused register bits (reserved and N/A) should be
written to a “0” level.
W311 Serial Configuration Map
1. The serial bits will be read by the clock driver in the following
order:
3. All register bits labeled “Initialize to 0" must be written to
zero during initialization.
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 0: Control Register 0
Bit
Pin#
Name
Reserved
Default
Description
Bit 7
–
0
Reserved
Bit 6
Bit 5
Bit 4
–
–
–
SEL2
SEL1
SEL0
0
0
0
See Table 5
See Table 5
See Table 5
Bit 3
–
FS_Override
0
0 = Select operating frequency by FS[4:0] input pins
1 = Select operating frequency by SEL[4:0] settings
Bit 2
Bit 1
Bit 0
–
–
–
SEL4
1
0
0
See Table 5
See Table 5
Reserved
SEL3
Reserved
Byte 1: Control Register 1
Bit
Bit 7
Pin#
Name
Reserved
Default
Description
-
-
-
-
0
0
0
0
Reserved
Bit 6
Spread Select2
Spread Select1
Spread Select0
‘000’ = Normal (spread off)
‘001’ = Test Mode
‘010’ = Reserved
‘011’ = Three-Stated
‘100’ = –0.5%
Bit 5
Bit 4
‘101’ = 0.5%
‘110’ = 0.25%
‘111’ = 0.38%
Bit 3
Bit 2
Bit 1
Bit 0
35
38
39
42
CPU3
CPU2
CPU1
APIC2
1
1
1
1
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Byte 2: Control Register 2
Bit Pin#
Name
PC8
Default
Description
(Active/Inactive)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
20
18
17
16
14
13
11
10
1
1
1
1
1
1
1
1
PCI7
(Active/Inactive)
PCI6
(Active/Inactive)
PCI5
(Active/Inactive)
PCI4
(Active/Inactive)
PCI3
(Active/Inactive)
PCI2
(Active/Inactive)
PCI1
(Active/Inactive)
Rev 1.0,November 25, 2006
Page 5 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
