W256
Serial Configuration Map
Byte 7: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
• TheSerialbitswillbereadbytheclockdriverinthefollowing
order:
Bit
Bit 7
Bit 6
Pin #
Description
Default
Byte 0 — Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 — Bits 7, 6, 5, 4, 3, 2, 1, 0
–
Reserved, drive to 0
1
1
19, 18 DDR3T_SDRAM6,
DDR3C_SDRAM7
.–
.
Byte N — Bits 7, 6, 5, 4, 3, 2, 1, 0
Bit 5
12, 13 DDR2T_SDRAM4,
DDR2C_SDRAM5
1
• Reserved and unused bits should be programmed to “0”.
• SMBus Address for the W256 is:
Bit 4
Bit 3
Bit 2
–
–
Reserved, drive to 0
Reserved, drive to 0
1
1
1
Table 1.
7, 8
DDR1T_SDRAM2,
DDR1C_SDRAM3
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
0
0
1
––
Bit 1
Bit 0
–
Reserved, drive to 0
1
1
Byte 6: Outputs Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
3, 4
DDR0T_SDRAM0,
DDR0C_SDRAM1
Bit Pin #
Description
Reserved, drive to 0
Default
Bit 7
Bit 6
Bit 5
Bit 4
–
–
–
1
0
0
0
1
1
Reserved, drive to 0
Reserved, drive to 0
FBOUT
Bit 3 27, 26 DDR5T_SDRAM10,
DDR5C_SDRAM11
Bit 2
–
Reserved, drive to 0
1
1
Bit 1 23, 22 DDR4T_SDRAM8,
DDR4C_SDRAM9
Bit 0
–
Reserved, drive to 0
1
Rev 1.0,November 25, 2006
Page 3 of 7
SPECTRALINEAR [ SPECTRALINEAR INC ]
