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CY28SRC01ZXCT 参数 Datasheet PDF下载

CY28SRC01ZXCT图片预览
型号: CY28SRC01ZXCT
PDF下载: 下载PDF文件 查看货源
内容描述: PCI - Express时钟发生器 [PCI-Express Clock Generator]
分类和应用: 时钟发生器PC
文件页数/大小: 9 页 / 94 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28SRC01  
AC Electrical Specifications  
Parameter  
Description  
Condition  
Min.  
Max.  
Unit  
Crystal  
TDC  
XIN Duty Cycle  
The device will operate reliably with  
input duty cycles up to 30/70 but the  
REFclockdutycyclewillnotbewithin  
specification  
47.5  
52.5  
%
TPERIOD  
TR / TF  
XIN Period  
When XIN is driven from an external 69.841  
clock source  
71.0  
10.0  
ns  
ns  
XIN Rise and Fall Times  
Measured between 0.3VDD and  
0.7VDD  
SRC  
TDC  
SRCT and SRCC Duty Cycle  
Measured at crossing point VOX  
Measured at crossing point VOX  
Measured at crossing point VOX  
Measured at crossing point VOX  
45  
55  
%
TPERIOD  
100-MHz SRCT and SRCC Period  
100-MHz SRCT and SRCC Period, SSC  
9.997001 10.00300 ns  
9.997001 10.05327 ns  
10.12800 9.872001 ns  
9.872001 10.17827 ns  
TPERIODSS  
TPERIODAbs 100-MHz SRCT and SRCC Absolute Period  
TPERIODSSAbs 100-MHz SRCTandSRCCAbsolutePeriod, SSC Measured at crossing point VOX  
TSKEW  
TSKEW  
Any SRCT/C to SRCT/C Clock Skew  
Measured at crossing point VOX  
Measured at crossing point VOX  
-
250  
250  
ps  
ps  
Any SRCS clock to Any SRCS clock Skew  
TCCJ  
SRCT/C Cycle to Cycle Jitter  
Measured at crossing point VOX  
Measured at crossing point VOX  
Measured from VOL = 0.175 to  
125  
300  
700  
ps  
ppm  
ps  
LACC  
SRCT/C Long Term Accuracy  
SRCT and SRCC Rise and Fall Times  
TR / TF  
175  
VOH = 0.525V  
TRFM  
Rise/Fall Matching  
Determined as a fraction of  
2*(TR – TF)/(TR + TF)  
20  
%
'TR  
Rise TimeVariation  
125  
125  
850  
ps  
ps  
'TF  
Fall Time Variation  
VHIGH  
VLOW  
VOX  
Voltage High  
Math averages Figure 3  
Math averages Figure 3  
660  
–150  
250  
mv  
mv  
mV  
V
Voltage Low  
Crossing Point Voltage at 0.7V Swing  
Maximum Overshoot Voltage  
550  
VOVS  
VHIGH  
0.3  
+
VUDS  
VRB  
Minimum Undershoot Voltage  
Ring Back Voltage  
–0.3  
V
V
See Figure 3. Measure SE  
0.2  
Test and Measurement Set-up  
The following diagram shows the test load configuration for the  
differential SRC outputs.  
M e a s u re m e n t  
P o in t  
ꢆ ꢇ ꢇ ꢈ:  
ꢀ ꢀ :  
S R C T  
ꢁ ꢂ ꢃꢂ :  
2 p F  
M e a s u re m e n t  
P o in t  
2 p F  
ꢆ ꢇ ꢇ ꢈ:  
ꢀ ꢀ :  
S R C C  
IR E F  
ꢁ ꢂ ꢃꢂ :  
ꢁ ꢄ ꢅ :  
Figure 3. 0.7V Load Configuration  
Rev 1.0,November 20, 2006  
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