CY28SRC01
Byte 2: Control Register 2 (continued)
Bit
3
@Pup
Name
Description
1
0
Reserved
SRC
Reserved
2
SRC Spread Spectrum Enable
0 = Spread off, 1 = Spread on
1
0
1
1
Reserved
Reserved
Reserved
Reserved
Byte 3: Control Register 3
Bit
7
@Pup
Name
Description
1
0
1
0
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
6
5
4
3
2
1
0
Byte 4: Control Register 4
Bit
7
@Pup
Name
Name
Name
Description
Description
Description
0
0
0
0
0
0
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
6
5
4
3
2
1
0
Byte 5: Control Register 5
Bit
7
@Pup
0
0
0
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
6
5
4
3
2
1
0
Byte 6: Control Register 6
Bit
@Pup
7
0
TEST_SEL
REF/N or Tri-state Select
1 = REF/N Clock, 0 = Tri-state
6
5
0
0
TEST_MODE
Reserved
Test Clock Mode Entry Control
1 = REF/N or Tri-state mode, 0 = Normal operation
Reserved
Rev 1.0,November 20, 2006
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