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CY28SRC01ZXCT 参数 Datasheet PDF下载

CY28SRC01ZXCT图片预览
型号: CY28SRC01ZXCT
PDF下载: 下载PDF文件 查看货源
内容描述: PCI - Express时钟发生器 [PCI-Express Clock Generator]
分类和应用: 时钟发生器PC
文件页数/大小: 9 页 / 94 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28SRC01  
Byte 6: Control Register 6  
Bit  
4
@Pup  
Name  
Description  
1
0
0
1
1
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
3
2
1
0
Byte 7: Control Register 7  
Bit  
7
@Pup  
Name  
Description  
0
0
1
1
1
0
0
0
Revision Code Bit 3  
Revision Code Bit 2  
Revision Code Bit 1  
Revision Code Bit 0  
Vendor ID Bit 3  
6
5
4
3
2
Vendor ID Bit 2  
1
Vendor ID Bit 1  
0
Vendor ID Bit 0  
Table 4. Crystal Recommendations  
Frequency  
(Fund)  
Drive  
(max.)  
Shunt Cap  
(max.)  
Tolerance  
(max.)  
Stability  
(max.)  
Aging  
(max.)  
Cut  
Loading  
Load Cap  
12pF - 16pF  
14.31818 MHz  
AT  
Parallel  
1mW  
7 pF  
+ 50ppm  
+ 50ppm  
5 ppm  
Crystal Recommendations  
Calculating Load Capacitors  
The CY28SRC01 requires a Parallel Resonance Crystal.  
Substituting a series resonance crystal will cause the  
CY28SRC01 to operate at the wrong frequency and violate the  
ppm specification. For most applications there is a 300-ppm  
frequency shift between series and parallel crystals due to  
incorrect loading.  
In addition to the standard external trim capacitors, trace  
capacitance and pin capacitance must also be considered to  
correctly calculate crystal loading. As mentioned previously,  
the capacitance on each side of the crystal is in series with the  
crystal. This means the total capacitance on each side of the  
crystal must be twice the specified crystal load capacitance  
(CL). While the capacitance on each side of the crystal is in  
series with the crystal, trim capacitors (Ce1,Ce2) should be  
calculated to provide equal capacitive loading on both sides.  
Crystal Loading  
Crystal loading plays a critical role in achieving low ppm perfor-  
mance. To realize low ppm performance, the total capacitance  
the crystal will see must be considered to calculate the appro-  
priate capacitive loading (CL).  
Clock Chip  
Ci2  
Ci1  
Figure 1 shows a typical crystal configuration using the two  
trim capacitors. An important clarification for the following  
discussion is that the trim capacitors are in series with the  
crystal not parallel. It’s a common misconception that load  
capacitors are in parallel with the crystal and should be  
approximately equal to the load capacitance of the crystal.  
This is not true.  
Pin  
3 to 6p  
X2  
X1  
Cs2  
Cs1  
Trace  
2.8pF  
XTAL  
Ce1  
Ce2  
Trim  
27pF  
Figure 2. Crystal Loading Example  
As mentioned previously, the capacitance on each side of the  
crystal is in series with the crystal. This means the total capac-  
Figure 1. Crystal Capacitive Clarification  
Rev 1.0,November 20, 2006  
Page 5 of 9