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CY28358 参数 Datasheet PDF下载

CY28358图片预览
型号: CY28358
PDF下载: 下载PDF文件 查看货源
内容描述: 200 - MHz差分时钟缓冲器/驱动器 [200-MHz Differential Clock Buffer/Driver]
分类和应用: 驱动器时钟
文件页数/大小: 10 页 / 136 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28358  
Serial Data Interface  
Data Protocol  
To enhance the flexibility and function of the clock synthesizer,  
a two-signal serial interface is provided. Through the Serial  
Data Interface, various device functions, such as individual  
clock output buffers, can be individually enabled or disabled.  
The registers associated with the Serial Data Interface  
initialize to their default setting upon power-up, and therefore  
use of this interface is optional. Clock device register changes  
are normally made upon system initialization, if any are  
required. The interface can also be used during system  
The clock driver serial protocol accepts block write, and block  
read operations from the controller. For block write/read  
operation, the bytes must be accessed in sequential order  
from lowest to highest byte (most significant bit first) with the  
ability to stop after any complete byte has been transferred.  
The block write and block read protocol is outlined in Table 1.  
The slave receiver address is 11010010 (D2h).  
operation for power management functions.  
T
Table 1. Block Read and Block Write Protocol  
Block Write Protocol  
Block Read Protocol  
Bit  
1
Description  
Bit  
1
Description  
Start  
Start  
2:8  
9
Slave address – 7 bits  
Write = 0  
2:8  
9
Slave address – 7 bits  
Write = 0  
10  
Acknowledge from slave  
10  
Acknowledge from slave  
11:18  
Command Code – 8 bits  
'00000000' stands for block operation  
11:18  
Command Code – 8 bits  
'00000000' stands for block operation  
19  
20:27  
28  
Acknowledge from slave  
Byte Count – 8 bits  
Acknowledge from slave  
Data byte 1 – 8 bits  
Acknowledge from slave  
Data byte 2 – 8 bits  
Acknowledge from slave  
......................  
19  
20  
Acknowledge from slave  
Repeat start  
21:27  
28  
Slave address – 7 bits  
Read = 1  
29:36  
37  
29  
Acknowledge from slave  
Byte count from slave – 8 bits  
Acknowledge  
38:45  
46  
30:37  
38  
....  
39:46  
47  
Data byte from slave – 8 bits  
Acknowledge  
....  
Data Byte (N–1) – 8 bits  
Acknowledge from slave  
Data Byte N – 8 bits  
Acknowledge from slave  
Stop  
....  
48:55  
56  
Data byte from slave – 8 bits  
Acknowledge  
....  
....  
....  
Data bytes from slave/Acknowledge  
Data byte N from slave – 8 bits  
Not Acknowledge  
....  
....  
....  
....  
Stop  
Rev 1.0,November 20, 2006  
Page 3 of 10