CXA2095S
Pin
No.
Symbol
Equivalent circuit
Description
SVCC
YS switch control input.
100µ
When YS is high, the RGB block signal is
selected; when YS is low, the Y/C block is
selected.
147
15
YS
15
VILMAX = 0.4V
40k
VIHMIN = 1.0V
VIHMAX = 3.0V
SVCC
200
30k
Analog R, G and B signal input.
RIN
GIN
BIN
Input a 0.7Vp-p (no sync, 100 IRE) signal via a
capacitor. The signal is clamped to 5.1V at the
burst timing of the signal input to the sync input
(Pin 44).
16
17
18
16
17
18
SVCC
Sample-and-hold for R, G and B AKB.
Connect to GND via a capacitor. When not using
AKB (manual cut-off mode), R, G and B cut-off
voltage can be controlled by applying a control
voltage to each pin. The control voltage is 4.2 ±
2V.
1k
RSH
GSH
BSH
19
21
23
19
21
23
50µ
SVCC
200
12k
ROUT
GOUT
BOUT
20
22
24
R, G and B signal output.
2.4Vp-p is output during 100% white input.
20
1100µ
Input the signal converted from the CRT beam
current (cathode current IK) to a voltage via a
capacitor. The V blanking part is clamped to 2.7V at
the V retrace timing.
SVCC
1k
The input for this pin is the reference pulse return,
and the loop operates so that the Rch, the Gch and
Bch are all 1Vp-p. ( For the CXA2025S, the loop
operates so that the Rch is 1Vp-p and the Gch and
Bch are 0.83Vp-p.) The Gch and Bch can be varied
by ±0.5V by the bus CUTOFF control. When not
using AKB, this pin should not be connected.
25 IKIN
25
50µ
SVCC
ABL control signal input and VSAW high voltage
fluctuation compensation signal input.
High voltage compensation has linear control
characteristics for the pin voltage range of about
8V to 1V.
ABLIN
/VCOMP
26
147
26
ABL operates when the pin voltage becomes
lower than about 1.2V.
– 5 –
SONY [ SONY CORPORATION ]
