CXA2095S
Pin
No.
Symbol
Equivalent circuit
Description
JVCC
50µ
I2C bus protocol SDA (Serial Data) I/O.
VILMAX = 1.5V
8
8
SDA
VIHMIN = 3.5V
VOLMAX = 0.4V
Switch control for the external YUV signal input.
When YUV SW is high, the external YUV signal
is selected; when YUV SW is low, the Y/C block
signal is selected. However, when the EY-SW
register is 1, the YIN (Pin 4) input is selected for
the Y signal even if YUV SW is high.
VILMAX = 0.4V
SVCC
100µ
147
YUV SW
9
9
40k
VIHMIN = 1.0V
VIHMAX = 3.0V
External Y signal input.
Input a 0.7Vp-p (100 IRE) Y signal via a
capacitor. The signal is clamped to 6.5V at the
burst timing of the signal input to the sync input
(Pin 44).
EYIN
10
11
12
SVCC
External R-Y signal input.
2k
Input a 0.78Vp-p (color difference signal
obtained by detecting a 100 IRE, 0.7Vp-p,
100% color bar chroma signal at the orthogonal
axis) + (R-Y) signal via a capacitor. The signal
is clamped to 6.2V at the burst timing of the
signal input to the sync input (Pin 44).
1k
ERYIN
10
11
12
40k
External B-Y signal input.
Input a 1.0Vp-p (color difference signal obtained
by detecting a 100 IRE, 0.7Vp-p, 100% color
bar chroma signal at the orthogonal axis) + (B-
Y) signal via a capacitor. The signal is clamped
to 6.2V at the burst timing of the signal input to
the sync input (Pin 44).
EBYIN
GND for the video block.
13 SGND
SVCC
YM switch control input.
When YM is high, the Y/C block signal is
attenuated by 6dB.
100µ
147
14
YM
14
VILMAX = 0.4V
VIHMIN = 1.0V
VIHMAX = 3.0V
40k
– 4 –
SONY [ SONY CORPORATION ]
