64Mbit - Enhanced SDRAM
2Mx32 ESDRAM
Product Brief
Features
•
100% Function and Timing Compatible with JEDEC
standard SDRAM
•
Upward Pin Compatible with JEDEC Std. SGRAM
•
Integrated 32Kbit SRAM Row Registers
•
Synchronous Operation up to 166MHz
•
22.6ns Row Access Latency, 10.6ns Column Latency
•
Four Bank Architecture
s
2K rows x 256 column x 32 bits x 4 banks
•
Early Auto-Precharge
•
Programmable Burst Length (1, 2, 4, 8, full page)
•
Programmable CAS Latency (1, 2, 3)
•
Hidden Auto-Refresh without closing Read Pages
•
Low Power Suspend, Self-Refresh, and Power Down
Modes Supported
•
Optional “No Write Transfer” Mode
•
Optional Read DQM Latency = 1 for CL = 1 (EMRS)
•
2K Refresh / 32 ms
•
Single 3.3V
±
0.3V Power Supply
•
Flexible V
DDQ
Supports LVTTL and 2.5V I/O
•
Programmable Output Impedance (EMRS)
•
100-pin LQFP (0.65mm pin pitch)
Description
The SM2605 Enhanced SDRAM (ESDRAM) is a single
data rate I/O device that combines raw speed with
innovative
architecture
to
optimize
system
price/performance in high performance video graphics and
embedded systems. The device is pin compatible with
JEDEC standard SGRAM. It is also function and timing
compatible with JEDEC standard SDRAM.
The four-bank architecture combines 22.6ns DRAM arrays
with an 8Kb 10.6ns SRAM row register per bank. The
SM2605 is a superset technology of JEDEC standard
SDRAM. Its three key functional features include early
auto-precharge, hidden RAS to CAS delay (t
RCD
), and an
optional No Write Transfer mode. The ESDRAM is capable
of maintaining four open read pages and four open write
pages simultaneously via the No Write Transfer mode.
FUNCTIONAL BLOCK DIAGRAM
ROW DECODER
ADDRESS BUFFERS
BA1
BA0
A(10:0)
BANK A
2K rows x
256 col x
32 bits
BANK B
2K rows x
256 col x
32 bits
BANK C
2K rows x
256 col x
32 bits
BANK D
2K rows x
256 col x
32 bits
DATA LATCHES
DATA LATCHES
DATA LATCHES
SENSE AMPLIFIERS
SENSE AMPLIFIERS
SENSE AMPLIFIERS
SENSE AMPLIFIERS
SRAM ROW CACHE
COLUMN DECODER
SRAM ROW CACHE
COLUMN DECODER
SRAM ROW CACHE
COLUMN DECODER
SRAM ROW CACHE
COLUMN DECODER
CLK
CKE
/CS
/RAS
/CAS
/WE
DQM(3:0)
Data I/O Buffers
COMMAND
DECODER
and
TIMING
GENERATOR
DQ(31:0)
The information contained herein is subject to change without notice.
Enhanced reserves the right to change or discontinue this product
without notice.
©
2000 Enhanced Memory Systems Inc.
1850 Ramtron Drive, Colorado Springs, CO 80921
Telephone
(800) 545-DRAM,
Fax
(719) 488-9095,
Web
http://www.edram.com
Rev. 1.6
DATA LATCHES
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
