P4C1024L
DATA RETENTION
Symbol
Test Conditions
Min
Unit
Parameter
Max
VDR
CE1 ≥ VCC -0.2V, CE2 ≤ 0.2V,
VIN ≥ VCC -0.2V or VIN ≤ 0.2V
2.0
5.5
V
VCC for Data Retention
Data Retention Current
(1)
ICCDR
VDR = 2.0V
VDR = 3.0V
30
50
µA
µA
Chip Deselect to Data
Retention Time
tCDR
See Retention Waveform
0
5
ns
ms
Operating Recovery Time
tR
1. CE1 ≥ VDR -0.2V, CE2 ≥ VDR -0.2V or CE2 ≤ 0.2V; or CE1 ≤ 0.2V, CE2 - 0.2V; VIN ≥ VDR -0.2V or VIN ≤ 0.2V
LOW VCC DATA RETENTION WAVEFORM 1 (CE1 CONTROLLED)
LOW VCC DATA RETENTION WAVEFORM 2 (CE2 CONTROLLED)
DATA RETENTION MODE
VCC
4.5V
4.5V
VDR
tCDR
tR
VIL
CE2
VIL
2.2V
CE2 ≤ -0.2V
Document # SRAM125 REV C
Page 7 of 10
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
