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P3C1024L-55SC 参数 Datasheet PDF下载

P3C1024L-55SC图片预览
型号: P3C1024L-55SC
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 128KX8, 55ns, CMOS, PDSO32, 0.445 INCH, PLASTIC, SOP-32]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 10 页 / 547 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
 浏览型号P3C1024L-55SC的Datasheet PDF文件第1页浏览型号P3C1024L-55SC的Datasheet PDF文件第2页浏览型号P3C1024L-55SC的Datasheet PDF文件第4页浏览型号P3C1024L-55SC的Datasheet PDF文件第5页浏览型号P3C1024L-55SC的Datasheet PDF文件第6页浏览型号P3C1024L-55SC的Datasheet PDF文件第7页浏览型号P3C1024L-55SC的Datasheet PDF文件第8页浏览型号P3C1024L-55SC的Datasheet PDF文件第9页  
P3C1024L - ULTRA LOW POWER 128K X 8 CMOS STATIC RAM  
CAPACITANCES(4)  
(VCC = 5.0V, TA = 25°C, f = 1.0 MHz)  
Symbol Parameter  
Test Conditions  
Max  
Unit  
CIN  
Input Capacitance  
Output Capacitance  
VIN=0V  
8
pF  
COUT  
VOUT=0V  
9
pF  
POWER DISSIPATION CHARACTERISTICS VS. SPEED  
Symbol Parameter  
Temperature Range  
-55  
-70  
Unit  
Commercial  
10  
8
mA  
ICC Dynamic Operating Current  
Industrial  
12  
10  
mA  
*Tested with outputs open and all address and data inputs changing at the maximum write-cycle rate.  
The device is continuously enabled for writing, i.e., CE2 VIH (min), CE1 and WE VIL (max), OE is high. Switching inputs are 0V  
and 3V.  
AC ELECTRICAL CHARACTERISTICS - READ CYCLE  
(Over Recommended Operating Temperature & Supply Voltage)  
-55  
-70  
Symbol Parameter  
Unit  
Min  
Max  
Min  
Max  
tRC  
tAA  
tAC  
tOH  
tLZ  
Read Cycle Time  
55  
70  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
55  
55  
70  
70  
Chip Enable Access Time  
Output Hold from Address Change  
Chip Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Enable Low to Data Valid  
Output Enable Low to Low Z  
Output Enable High to High Z  
Chip Enable to Power Up Time  
Chip Disable to Power Down Time  
10  
10  
10  
10  
tHZ  
tOE  
tOLZ  
tOHZ  
tPU  
tPD  
20  
25  
35  
25  
5
5
20  
25  
70  
0
0
55  
Document # SRAM132 REV A  
Page 3