PACE1754
TERMINAL CONNECTIONS
Case Outlines: Leaded Chip Carrier with unformed leads (Case U) and Leaded Chip Carrier with Gull-
Wing Leads (Case Y)
Terminal
Number
Terminal
Symbol
Terminal
Number
Terminal
Symbol
Terminal
Number
Terminal
Symbol
1
2
GND
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
IB
IB
IB
IB
47
48
49
50
51
52
A
3
12
13
14
15
SC
GND
0
3
SC1
A
2
4
TEST ON
RESET
A /EXT AD
1
1
5
PARITY/IB
A /EXT AD
0
16
0
6
TEST END
TIMER CLK
ME PA ER/RAM DIS
SC
SC
TC
4
3
7
EX AD ER/SING ERR 53
8
SC
INTA
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
2
9
V
CC
STRT ROM
CPU CLK
STRBA
STRBD
STRB EN
EX RDY
RDYD
R/W
10
11
12
13
14
15
16
17
18
19
20
21
IB
IB
IB
IB
IB
IB
IB
IB
V
CC
0
1
2
3
4
5
6
7
GND
A
A
A
A
A
A
A
A
A
A
15
14
13
12
11
10
9
GND
M/IO
EX RDY
MEMW
MEMR
IOW
1
IB
IB
8
9
8
7
GND
IOR
6
22
23
IB
IB
45
46
A
A
V
CC
10
11
5
4
Do c um e nt # MICRO-5 REV C
Pa g e 6 o f 20