PACE1754
AC ELECTRICAL CHARACTERISTICS1, 2
(V = 5V ± 10% Over Recommended Operating Conditions)
CC
20 MHz
30MHz
40 MHz
Symbol
Parameter
Min Max Min Max Min Max Unit
tEX RDY (RDYD)
Time from External Ready to
Ready Data Valid
16
28
29
31
24
24
26
26
22
30
26
30
30
25
14
22
21
22
18
18
20
20
17
25
20
25
25
20
12
16
19
20
12
12
15
15
12
20
15
25
20
18
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
tC (RDYD)
Time from Clock Read to
Ready Data Valid
V
tSTRBA (A)
Time from Strobe Address HIGH to
Address Bus Valid
H
V
tIBA (A)
Time from Information Bus Address to
Address Bus Valid
V
V
tFC (R)
Time from Falling Clock to
Read LOW
L
tSTRBD (R)
Time from Strobe Data HIGH to
Read HIGH
H
H
tSTRBD (W)
Time from Strobe Data LOW to
Write LOW
L
L
tSTRBD (W)
Time from Strobe Data HIGH to
Write HIGH
H
H
tIBD (ME PA ER)
Time from Information Bus Data into
Memory Parity Error LOW
IN
L
tIBA (EX AD ER)
Time from Information Bus Address into
External Address Error
IN
tSTRBD –
Time from Strobe Data LOW to
Start-up ROM Valid
L
(STRT ROM)
V
V
tFC (IB OUT)
Time from Falling Clock to
Information Bus Valid
tC (TIMER CLK)
Time from Rising Edge of Clock to
Timer Clock
tIB IN (IB16)
Time from Information Bus Data to
Parity Valid
V
tEXT AD (CLKB3)
tEX RDY1 (RDYD)
tFC (SCR EN)
Extended Address
Setup Time
10
10
10
Time from External Ready Data to
Ready Data Valid
28
30
30
24
24
24
21
24
24
V
Time from Falling Clock to SCR Enable;
Case Types T and X only
tSTRBD (SCR EN)
Time from STRBD HIGH to SCR Enable;
Case Types T and X only
H
Notes:
1. 4.5V ≤ V ≤ 5.5V, –55°C ≤ T ≤ +125°C. Unless otherwise specified, testing shall be conducted at worst-case conditions.
CC
C
2. All measurements of delay times on active signals are related to the 1.5V levels.
Do c um e nt # MICRO-5 REV C
Pa g e 4 o f 20
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
