AS80SSTVF16859
&
Pin Configuration (64-Pin TSSOP)
Pin number
Pin name
Q(13:1)
GND
Type
Description
1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 16, 17, 19, 20,
21, 22, 23, 24, 25, 28, 29, 30, 31, 32
Output Data output
PWR Ground
7, 15, 26, 34, 39, 43, 50, 54, 58, 63
Output supply voltage, 2.5 V
nominal
6, 18, 27, 33, 38, 47, 59, 64
VDDQ
PWR
35, 36, 40, 41, 42, 44, 52, 53, 55, 56, 57, 61, 62
D(13:1)
CLK
CLKB
VDD
Input Data input
48
49
Input Positive master clock input
Input Negative master clock input
PWR Core supply voltage, 2.5 V nominal
Input Reset (active low)
37, 46, 60
51
RESETB
Input reference voltage, 1.25 V
nominal
45
VREF
Input
Pin Configuration (56-Pin MLF2)
Pin number
Pin name
Q(13:1)
GND
Type
Description
1, 2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 18, 19,
20, 21, 22, 50, 51, 52, 53, 54, 56
Output Data output
PWR Ground
37, 48
Output supply voltage, 2.5 V
nominal
9, 17, 23, 27, 34, 44, 49, 55
VDDQ
PWR
24, 25, 28, 29, 30, 31, 39, 40, 41, 42, 43, 46, 47
D(13:1)
CLK
CLKB
VDD
Input Data input
35
36
Input Positive master clock input
Input Negative master clock input
PWR Core supply voltage, 2.5 V nominal
Input Reset (active low)
26, 33, 45
38
RESETB
Input reference voltage, 1.25 V
nominal
32
–
VREF
Input
Center
pad
PWR Ground (VFQFN package only)
8/6/03, v.0.10
Alliance Semiconductor
P. 3 of 13
PULSECORE [ PulseCore Semiconductor ]
