Full Fra m e CCD Se ns o r
Imaging Area
Figure 1. Pinout Configuration
The imaging area is an array of 1100
columns (vertical CCD shift registers).
Each column has 330 picture elements.
The pixel size is 24 µm by 24 µm. The
total imaging area is 26.4 mm by 7.92 mm.
Typical spectral response as a function
of wavelength is shown in Figure 2.
This is for both the standard array and
an array coated with lumogen, an UV
phosphor that extends the range of the
detector into the ultraviolet.
+
-
Ø1V
Ø3V
ØTG2
VLD
Ø2V
ØTG1
N/C
VSUB
LS
Ø1H
Ø2H
ØLG1
VDD
VOUT
VLD
ØLG2
LS
TEMP+
TEMP-
VSUB
ØTG2
Ø3V
Ø1V
Ø2V
ØTG1
VSS
VRD
ØRG
VOG
In the vertical direction, each pixel
ØSG
corresponds to one stage (three electrodes)
of the shift register. The three electrode
groups are driven by three-phases (Ø1V -
Ø3V) brought in from both edges of the
array to improve clock electrode response
time. Charge packets (imaging data) in the
vertical register can be shifted to the hori-
zontal readout by clocking the three phases
(Ø1V, Ø2V and Ø3V). A transfer gate (ØTG) is
provided at the interface of the vertical reg-
ister. The transfer gate controls the transferring
of charge into the horizontal readout register.
Charge flow is from Ø3 gate of the vertical
shift register into Ø1 gate of the horizontal
readout register. The control function is
performed by pulsing the transfer gate high
to permit the charge flow from the vertical
register into the horizontal register for
readout. When the potential of the vertical
register electrodes is held steady, a potential
well is created beneath the storage gates
Ø1V and Ø2V. When an image impinges
on the sensing area, an electrical signal of
the scene will be collected in the potential
well during this integration period.
Figure 2. Quantum Efficiency
60
50
40
30
20
10
0
200
300
400
500
600
700
800
900
1000
1100
Wavelength, nm
Following the integration interval, the
collected charge (signal) in the array can
be read out as a full frame image by
transferring the charge, one or more rows at
a time, into the horizontal shift register.
From here, the charge can be shifted serially
to the output amplifier. A mechanical
shutter is needed to shield the array from
incident light during the readout process.
A strobe illumination could be used to
stimulate the shuttered mode of operation.
Image smearing degrades the performance,
particularly at low data rates, unless
shuttering is provided.
Figure 3. Functional Diagram
Imaging Area
Ø1V
Ø2V
Ø3V
1100 (H) x 330 (V) - active pixels
Horizontal Register
ØTG
Ø1H
Ø2H
ØLG
VLD
The horizontal shift register is driven by
two phase clocks (Ø1H and Ø2H). The
horizontal register has 1100 stages plus
an extension of 35 stages ( 3 dummy stages,
16 leading isolation stages and 16 trailing
isolation stages). As a result, amplifier
power is dissipated more efficiently and
dark current generation by localized heating
is minimized.
Horizontal CCD Shift
Output Buffer
www.perkinelmer.com/opto
DSP-303.01C - 8/2002W Page 2
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