FEDL87V2107-01
OKI Semiconductor
ML87V2107
4.6 Output Enable/Disable Setting
By setting the OUTDS(SUB:72h-bit[1]) = 1, the output pins (YO[7:0], CO[7:0], OVS, OHS, HREF, CLKO,
TRG) are put in the Hi-Z state.
At system reset (external pin RESET = 0), all the output pins can be set to Enable/Disable by the external pin OE
regardless of the setting of OUTDS.
By setting external pins OE and OEINV (SUB:72h-bit[3]), the output data pins (YO[7:0], CO[7:0]) can be put in
the Hi-Z state.
Table F4-6 Output Pin Enable/Disable Setting
RST
1
OUTDS
OE
0
OEINV
Data output pin
Disable
Output pins other than data
0
0
0
1
Enable
Enable
Enable
Enable
Disable
Disable
Enable
1
0
Enable
1
0
1
0
Enable
1
0
1
1
Disable
1
1
X
0
X
Disable
0
0 *1
0 *1
0 *1
0 *1
Disable
0
1
Enable
*1: Fixed to 0 by system reset.
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