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M13S128168A-6T 参数 Datasheet PDF下载

M13S128168A-6T图片预览
型号: M13S128168A-6T
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×16位×4银行双倍数据速率SDRAM [2M x 16 Bit x 4 Banks Double Data Rate SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 49 页 / 1492 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M13S128168A  
DC Specifications  
Version  
Parameter  
Symbol  
Test Condition  
Unit Note  
-6  
-5  
Operation Current  
(One Bank Active)  
tRC = tRC (min) tCK = tCK (min)  
Active – Precharge  
IDD0  
170  
145  
mA  
Burst Length = 2 tRC = tRC (min), CL=  
2.5 IOUT = 0mA, Active-Read-  
Precharge  
Operation Current  
(One Bank Active)  
IDD1  
IDD2P  
IDD2N  
IDD3P  
175  
40  
150  
40  
mA  
mA  
mA  
mA  
Precharge Power-down Standby  
Current  
CKE VIL(max), tCK = tCK (min), All  
banks idle  
CKE VIH(min), CS VIH(min), tCK  
tCK (min)  
=
Idle Standby Current  
115  
50  
95  
Active  
Power-down  
Standby  
All banks ACT, CKE VIL(max), tCK  
tCK (min)  
=
=
45  
Current  
One bank; Active-Precharge, tRC  
Active Standby Current  
IDD3N  
t
RAS(max),  
120  
110  
mA  
tCK = tCK (min)  
Burst Length = 2, CL= 2.5 , tCK = tCK  
(min), IOUT = 0Ma  
Operation Current (Read)  
Operation Current (Write)  
IDD4R  
IDD4W  
245  
240  
215  
200  
mA  
mA  
Burst Length = 2, CL= 2.5 , tCK = tCK  
(min)  
Auto Refresh Current  
Self Refresh Current  
IDD5  
IDD6  
270  
5
250  
5
mA  
mA  
tRC tRFC(min)  
CKE 0.2V  
1
Note 1. Enable on-chip refresh and address counters.  
AC Operation Conditions & Timing Specification  
AC Operation Conditions  
Parameter  
Symbol  
VIH(AC)  
VIL(AC)  
VID(AC)  
Min  
Max  
Unit  
Note  
Input High (Logic 1) Voltage, DQ, DQS and DM signals  
Input Low (Logic 0) Voltage, DQ, DQS and DM signals  
VREF + 0.31  
V
V
V
VREF - 0.31  
VDDQ+0.6  
0.7  
1
2
Input Different Voltage, CLK and CLK inputs  
VIX(AC)  
0.5*VDDQ-0.2 0.5*VDDQ+0.2  
V
Input Crossing Point Voltage, CLK and CLK inputs  
Note1. VID is the magnitude of the difference between the input level on CLK and the input on CLK .  
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the  
same.  
Input / Output Capacitance  
(VDD = 2.375V~2.75V, VDDQ =2.375V~2.75V, TA = 25°C , f = 1MHz)  
Parameter  
Symbol  
CIN1  
Min  
2.5  
Max  
3.5  
Unit  
pF  
Input capacitance  
(A0~A11, BA0~BA1, CKE, CS , RAS , CAS , WE )  
CIN2  
2.5  
3.5  
pF  
Input capacitance (CLK, CLK )  
Data & DQS input/output capacitance  
Input capacitance (DM)  
COUT  
CIN3  
4.0  
4.0  
5.5  
5.5  
pF  
pF  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Jun. 2007  
Revision : 1.8 6/49