ESMT
M13S128168A
AC Timing Parameter & Specifications-continued
-5
-6
Symbol
Parameter
min
max
min
max
Half Clock Period
tHP
tQH
tRAS
tRC
tCLmin or tCHmin
-
tCLmin or tCHmin
-
ns
ns
DQ-DQS output hold
time
t
HP-0.45
-
tHP-0.5
-
ACTIVE to PRECHARGE
command
40
60
70
120Kns
42
60
72
120Kns
ns
ns
ns
Row Cycle Time
-
-
-
-
AUTO REFRESH Row Cycle
Time
tRFC
ACTIVE to READ,WRITE
delay
tRCD
tRP
18
18
-
-
18
18
-
-
ns
ns
PRECHARGE command
period
ACTIVE to READ with
AUTOPRECHARGE
command
tRAP
18
120K
18
120K
ns
ACTIVE bank A to ACTIVE
bank B command
tRRD
tWR
10
2
-
-
-
12
2
-
-
-
ns
tCK
tCK
Write recovery time
Write data in to READ
command delay
tWTR
1
1
Col. Address to Col. Address
delay
tCCD
tREFI
1
-
-
1
-
-
tCK
us
Average periodic refresh
interval
15.6
15.6
Write preamble
tWPRE
tWPST
tRPRE
tRPST
0.25
0.4
-
0.25
0.4
-
tCK
tCK
tCK
tCK
Write postamble
0.6
1.1
0.6
0.6
1.1
0.6
DQS read preamble
DQS read postamble
0.9
0.9
0.4
0.4
Clock to DQS write preamble
setup time
tWPRES
0
2
-
-
0
1
-
-
ns
Load Mode Register /
Extended Mode register
cycle time
tMRD
tCK
Exit self refresh to READ
command
tXSRD
tXSNR
200
75
-
-
200
75
-
-
tCK
ns
Exit self refresh to
non-READ command
(tWR/tCK
)
(tWR/tCK
)
Autoprecharge write
recovery+Precharge time
tDAL
+
+
tCK
(tRP/tCK
)
(tRP/tCK)
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2007
Revision : 1.8 8/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
