M11L416256A/M11L416256SA
FUNCTIONAL BLOCK DIAGRAM
WE
DATA-IN BUFFER
RAS
CONTROL
LOGIC
IO0
:
IO15
16
CASL
CASH
CLOCK
GENERATOR
DATA-OUT
BUFFER
OE
COLUMN
DECODER
COLUMN
ADDRESS
BUFFER
9
9
16
A0
A1
A2
A3
512
16
SENSE AMPLIFIERS
I/O GATING 8
REFRESH
CONTROLER
512 x 16
A4
A5
A6
REFRESH
COUNTER
A7
A8
99
512 x 512 x 16
MEMORY
ARRAY
512
ROW.
ADDRESS
BUFFERS(9)
9
9
VCC
VSS
VBB GENERATOR
PIN DESCRIPTIONS
PIN NO.
PIN NAME
TYPE
DESCRIPTION
Address Input
16~19,22~26
A0~A8
Input
Row Address : A0~A8
Column Address : A0~A8
14
28
29
13
27
Input
Input
Input
Input
Input
Row Address Strobe
RAS
CASH
CASL
WE
Column Address Strobe / Upper Byte Control
Column Address Strobe / Lower Byte Control
Write Enable
Output Enable
OE
2~5,7~10,31~34,36~39 I/O0 ~ I/O15
Input / Output Data Input / Output
CC
1,6,20
21,35,40
V
Supply
Ground
-
Power, 3.3V
Ground
SS
V
11,12,15,30
NC
No Connect
Elite Memory Technology Inc
Publication Date: Agu. 2001
Revision : 1.3 2/16
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
