EliteMT
(Continued)
M11B416256A
-25
-35
PARAMETER
SYMBOL
UNIT Notes
MAX
MIN
MAX
MIN
Read Command Setup Time
tRCS
tRCH
0
0
ns
ns
15,18
Read Command Hold Time Reference to
0
0
9,15,19
CAS
Read Command Hold Time Reference to
RAS
tRRH
tCLZ
0
3
0
3
ns
ns
9
20
CAS to Output in Low-Z
Output Buffer Turn-off Delay From CAS
or RAS
10,17,2
0
tOFF1
tOFF2
3
15
6
3
15
8
ns
ns
ns
ns
ns
17,26
Output Buffer Turn-off to OE
Write Command Setup Time
11,15,1
8
tWCS
tWCH
tWCR
0
5
0
5
Write Command Hold Time
Write Command Hold Time (Reference
to RAS )
15,25
22
30
15
Write Command Pulse Width
tWP
tRWL
tCWL
5
7
5
9
ns
ns
15
15
Write Command to RAS Lead Time
5
0
7
0
ns
ns
ns
ns
15,19
12,20
12,20
Write Command to CAS Lead Time
Data-in Setup Time
tDS
tDH
Data-in Hold Time
5
5
tDHR
tRWD
tAWD
tCWD
22
30
Data-in Hold Time (Reference to RAS )
RAS to WE Delay Time
34
21
51
34
ns
ns
ns
11
11
Column Address to WE Delay Time
17
26
11,18
2,3
CAS to WE Delay Time
Transition Time (rise or fall)
Refresh Period (512 cycles)
tT
1.5
50
8
2.5
50
8
ns
tREF
ms
tRPC
tCSR
tCHR
10
5
10
10
10
ns
ns
ns
RAS to CAS Precharge Time
CAS Setup Time(CBR REFRESH)
CAS Hold Time(CBR REFRESH)
1,18
1,19
7
OE Hold Time From WE During
Read-Mode-Write Cycle
tOEH
4
4
ns
16
tOES
tOEHC
tOEP
4
2
2
4
2
2
ns
ns
ns
OE Low to CAS High Setup Time
OE High Hold Time From CAS High
OE Precharge Time
OE Setup Prior to RAS During Hidden
Refresh Cycle
tORD
0
4
0
5
ns
ns
Last CAS Going Low to First CAS
Returning High
tCLCH
21
Data Output Hold After CAS Returning
Low
tCOH
tWHZ
3
3
3
3
ns
ns
7
7
Output Disable Delay From WE
Elite Memory Technology Inc
Publication Date : Jun. 2006
Revision : 2.1 5/15
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
