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PBL40215 参数 Datasheet PDF下载

PBL40215图片预览
型号: PBL40215
PDF下载: 下载PDF文件 查看货源
内容描述: RF收发器电路的数字增强无绳通信( DECT )系统 [RF Transceiver circuit for the Digital Enhanced Cordless Telecommunications (DECT) system]
分类和应用: 通信
文件页数/大小: 22 页 / 218 K
品牌: ERICSSON [ ERICSSON ]
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PBL 402 15  
Pin Descriptions (cont.):  
Pin number  
Name  
Function  
Schematic in/output of the pin  
A diode to GndFM and GndIF  
24  
GndRSSI  
Ground connection to the RSSI.  
V
CCRF  
25  
PA Gate  
Output control signal for external PA power on/off.  
PA - Gate  
GndRF  
V
CCIF  
26  
27  
IFIN-  
Rx IF inputs to internal channel filtering, limiting  
amplifiers,RSSI and FM discriminator. Internally  
matched to 300 .  
IFIN-/IFIN+  
both inputs alike  
IFIN+  
GndIF  
28  
29  
GndIF  
VCCIF  
Ground connection to the down IF convertor and  
channel filter sections.  
Voltage supply to the down IF convertor and  
channel filter sections.  
A diode to GndFM and GndIF  
Clamp to GndIF  
VCCRF  
30  
LD  
Lock detect.  
LD  
GndRF  
V
CCRF  
31  
32  
IFOUT-  
IFOUT+  
Rx IF outputs to external adjacent channel filter.  
Internally matched to 300.  
IFOUT-/IFOUT+  
both outputs alike  
GndRF  
33, 36  
37, 40  
GndRF  
Ground connection to the RF sections.  
A diode to GndIF and GndPLL  
V
CCRF  
34  
35  
RX-  
RX+  
RF inputs to LNA and image reject mixer.  
Internally matched to 100.  
RX-/RX+  
both inputs alike  
GndRF  
VCCRF  
38  
39  
TX-  
TX+  
Tx outputs to external PA. Internally matched to  
100 . Each output requires an externalchoke  
to VCC.  
TX-/TX+  
Both inputs alike  
GndRF  
Clamp to GndRF  
41  
42  
VCCRF  
GATE  
Voltage supply to the RF sections.  
VCCPLL  
GATE  
Bias  
Input to gate the Tx output power.  
GndPLL  
CCPLL  
V
43  
D
Serial interface, Data .  
D
Bias  
GndPLL  
5