EM73P362
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
LOW BATTERY DETECTOR ( LBD )
EM73P362 has a built-in low battery detector. This function is disabled when CPU is reseted or in the STOP
/IDLE operation mode. User must enable the low battery detector by self when the CPU is waked up. If the
low battery detector is enabled, the operating current of whole chip will increase.
P15.0
BAT
+
_
reference voltage
CONTROL OF LOW BATTERY DETECTOR
Port15 is the control register of low battery detector. P15.1 (Low battery detector status) is a read-only bit.
When LBE is 1, the low battery detector is enabled. When VDD<1.35 ± 0.05V, SLB is 1.
P15 ( write port )
P15 ( read port )
Initial value : **00
3
2
1
*
0
3
2
1
0
*
*
LBE
*
*
SLB
*
LBE
0
1
Low battery detector control
Low battery detector disable
Low battery detector enable
SLB
0
1
Status of low battery detector
VDD > 1.25 ± 0.05V
VDD < 1.25 ± 0.05V ( Low battery )
* This specification are subject to be changed without notice.
28
11.1.2001