PRELIMINARY
C9716J
100 MHz Clock Generator with SSCG and Power Management for Mobile Application
Spectrum Spreading Selection Table
Min
(MHz)
Center
(MHz)
Max
(MHz)
CPU
Frequency
% OF FREQUENCY
SPREADING
MODE
98.51285 99.2634 100.01397
65.6649 66.166 66.667
100.00
66.66
1.5% (-1.5% + 0%)
1.5% (1.5% + 0%)
Down Spread
Down Spread
Test and Measurement Condition
Output
Buffer
Test Point
Specified Test Load Condition
CL
Clock Output Wave form
3.3 V Clocking Interface
PCI ( 1:5) , 48-24M, REF(1,2)
tHKP
2.5 V Clocking Interface
CPU (1,2)
tHKP
Duty Cycle
Duty Cycle
3.3 V
2.5 V
2.4 V
1.5 V
0.4 V
0.0 V
2.0 V
1.25 V
0.4 V
0.0 V
tprise tpfall
tprise tpfall
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07046 Rev. **
5/03/2001
Page 6 of 13
CYPRESS [ CYPRESS ]
