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CS5127GDW16 参数 Datasheet PDF下载

CS5127GDW16图片预览
型号: CS5127GDW16
PDF下载: 下载PDF文件 查看货源
内容描述: 双输出非同步降压控制器,具有同步功能及二通道启用 [Dual Output Nonsynchronous Buck Controller with Sync Function and Second Channel Enable]
分类和应用: 控制器
文件页数/大小: 24 页 / 296 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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Theory of Operation: continued  
mode controller relies on a change in the error signal to  
indicate a change in the line and/or load conditions. The  
error signal change causes the error loop to respond with a  
correction that is dependent on the gain of the error ampli-  
fier. A current mode controller has a constant error signal  
during line transients, since the slope of the ramp signal  
will change in this case. However, regulation of load tran-  
C
Lead Waveform  
T
If the sync pulse is longer  
Sync Lead Waveform  
than the C lead discharge  
T
time, a short Òdead spotÓ  
will exist during which the  
output driver is off.  
2ª  
sients still requires a change in the error signal. V  
control maintains a fixed error signal for both line and  
load variation, since the ramp signal is affected by both.  
Figure 2a: Sync pulse duration vs. CT lead discharge time.  
Voltage Mode Control  
The CS5127 can be operated in voltage mode if necessary.  
The best way to determine if the pulse width is sufficiently  
short is to examine the CT lead waveform with an oscillo-  
scope. If Òdead spotsÓ are observed in the CT lead waveform,  
decreasing the SYNC pulse width should be considered.  
For example, if very small values of output ripple voltage  
2ª  
are required, V  
control may not operate correctly.  
Details on how to choose the components for voltage  
mode operation are provided in the section on VFFB com-  
ponent selection.  
Alternatively, the SYNC signal may be AC coupled through  
a small capacitor. In this case, care must be taken to ensure  
that current pulled out of the IC during the high-to-low tran-  
sition of the SYNC signal is limited to less than 5mA.  
Constant Frequency  
2ª  
As output line and load conditions change, the V  
con-  
trol loop modifies the switch duty cycle to regulate the  
output voltage. The CS5127 uses a fixed frequency archi-  
tecture. Both output channels are controlled from a  
common oscillator. The CS5127 can typically provide a  
maximum duty cycle of about 90%.  
SYNC  
Oscillator  
20k  
2200p  
Sync Function  
It is sometimes desirable to shift the switching noise spec-  
trum to different frequencies. A pulse train applied to the  
SYNC lead will terminate charging of the CT lead capacitor  
and pull the CT lead voltage to ground for the duration of  
the positive pulse level. This reduces the period of oscilla-  
tion and increases the switching frequency.  
Figure 2b: Capacitive coupling of the SYNC signal. The external diode  
is used to clamp the IC substrate diode if ISYNC is greater than 5mA  
during the negative portion of the input waveform.  
Synchronization must always be done at a frequency  
higher than the typical oscillator frequency. Using a lower  
frequency will lead to erratic operation and poor regula-  
tion. The SYNC pulse train frequency should be at least 10  
% higher than the unsynchronized oscillator frequency.  
Synchronizing the oscillator will also decrease the maxi-  
mum duty cycle. If the nominal oscillator frequency is  
200kHz, increasing the oscillator frequency by 10% (to  
220kHz) will decrease the maximum duty cycle from a  
typical of 90% to about 89%. Increasing the frequency by  
25% (to 250kHz) will change the maximum duty cycle to  
about 87%. A 50% increase (to 300kHz) gives a maximum  
duty cycle of about 85%. The width of the SYNC pulse  
should be slightly shorter than the duration of the falling  
edge of the CT lead waveform (see Figure 2a) so the SYNC  
pulse doesnÕt interfere with the oscillator function.  
Overcurrent Protection  
The CS5127 has no on-board current limit circuitry. An  
example current limit circuit is provided in the Additional  
Application Circuits section of this data sheet.  
6