Applications Information: continued
The DC voltage for the VFFB pin is usually provided from
the output voltage through an RC filter if VOUT is less than
3V. If VOUT is greater than 2.9V, a resistor divider from
VOUT is recommended for proper circuit bias due to the
common mode input range limitations of the PWM com-
parator. In most cases, the FB pin resistor divider can be
used for this purpose with very little error, but a separate
divider is recommended if high accuracy is required. The
filter network is typically composed of a 1K resistor (RFFB
and a 330 pF capacitor (CFFB). This filter gives a 330 ns
time constant which is sufficient to remove switching
noise from the DC voltage. Note that in cases where a
resistor divider provides the ramp signal, the resistor
between VOUT and the VFFB pin serves as RFFB. An artificial
ramp signal is generated using an NPN transistor (Q1), a
small coupling capacitor (CC) and a second resistor (RR).
The NPN transistor collector is connected either to the
external 5V supply or to the ICÕs 5V on-chip reference. The
transistorÕs base is connected to the CT pin, and the ramp
on the CT pin is used to provide the artificial ramp. The
transistorÕs emitter is connected to the coupling capacitor.
The capacitor value should provide a low impedance at
the switching frequency. A 0.1 µF capacitor represents 6.4
ohms at 250 kHz. A resistor is placed in series between this
capacitor and the VFFB pin to set the amplitude of the ramp
signal.
if DC voltage is provided from the output, or
(RESR) (VOUT)(R1)
VRAMP
=
2000 (LOUT) (R1 + R2)
if DC voltage is provided from a resistor divider as in
figure 5.
)
where RESR is the equivalent series resistance in ohms of
the total output capacitance, VOUT is the output voltage in
volts and LOUT is the inductor value in Henries. The result
is VRAMP given in millivolts per oscillator period. This
value is the optimum amplitude for the artificial ramp.
Note that COMP pin voltage changes and output ripple
voltage must be added to the ramp amplitude for proper
operation.
Once the total ramp signal has been determined, the value
of the ramp resistor (RR) can be determined. The ramp
resistor and filter resistor RFFB create a resistor divider
between the output voltage and the artificial ramp voltage.
We can assume the output does not change, and that the
maximum input voltage to the divider is equal to the DC
output voltage plus the CT pin voltage swing of 2.1V. The
ramp amplitude on the filter capacitor is then the divider
output voltage:
GATE
V
OUT
(2.1V) (RFFB
)
VRAMP
=
(RR + RFFB
)
+
R2
V
FB
5V
Rearranging, we have
C
V
FFB
T
2.1V
Q1
R
RR
FFB
RR = RFFB
- 1
V
RAMP
(
)
CC
CT
R1
C
FFB
RE
Selecting the Catch Diode
Figure 4: Artificial ramp components CC, CFFB, RR and RFFB must be
provided for each channel if duty cycle for that channel exceeds 50%. Q1
and RE are common to both channels. DC voltage is shown supplied to
VFFB through the VFB resistor divider.
The schottky ÒcatchÓ diode must be capable of handling
the peak inductor current and must withstand a reverse
voltage at least equal to the value of VIN. Since the catch
diode only conducts during switch off-time, the average
current through the catch diode is defined as:
The amount of artificial ramp is dependent on oscillator
frequency, output voltage, output capacitor equivalent
series resistance (ESR), and inductor value. It also assumes
very small voltage fluctuations on the COMP pin. If the
added ramp is too small, it will not be sufficient to prevent
2ª
VIN - VOUT
ICATCH = IOUT
(
)
VIN
subharmonic oscillation. If the ramp is too large, V
con-
Minimizing the diode on-voltage will improve efficiency.
trol will be defeated, and loop regulation will enter voltage
mode control. DC regulation will be adequate, but tran-
sient response will be degraded. However, this may be
desirable in cases where very low values of output ripple
voltage are desired.
Selecting Oscillator Components RT and CT
The on-chip oscillator frequency is set by two external
components. RT sets the oscillator charge current. It is con-
nected to a voltage reference approximately equal to 2.5V.
The current generated in this fashion charges the CT capac-
itor between threshold levels of 1.5V and 3.6V. CT
The artificial ramp amplitude can be calculated as follows:
(RESR) (VOUT
)
VRAMP
=
2000 (LOUT
)
capacitor discharge is done by a saturating NPN, and the
9
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
