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ADS5240 参数 Datasheet PDF下载

ADS5240图片预览
型号: ADS5240
PDF下载: 下载PDF文件 查看货源
内容描述: 4通道, 12位, 40MSPS ADC,具有串行LVDS接口 [4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface]
分类和应用:
文件页数/大小: 24 页 / 410 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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Burr Brown Products
from Texas Instruments
ADS5240
¨
SBAS326C – JUNE 2004 – REVISED DECEMBER 2004
4-Channel, 12-Bit, 40MSPS ADC
with Serial LVDS Interface
FEATURES
Maximum Sample Rate: 40MSPS
12-Bit Resolution
No Missing Codes
Power Dissipation: 607mW
CMOS Technology
Simultaneous Sample-and-Hold
70.5dBFS SNR at 10MHz IF
Internal and External References
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
MSB and LSB First Modes
Option to Double LVDS Clock Output Currents
Pin- and Format-Compatible Family
HTQFP-64 PowerPAD™ Package
An integrated phase lock loop multiplies the incoming
ADC sampling clock by a factor of 12. This 12x clock
is used in the process of serializing the data output
from each channel. The 12x clock is also used to
generate a 1x and a 6x clock, both of which are
transmitted as LVDS clock outputs. The 6x clock is
denoted by the differential pair LCLK
P
and LCLK
N
,
while the 1x clock is denoted by ADCLK
P
and
ADCLK
N
. The word output of each ADC channel can
be transmitted either as MSB or LSB first. The bit
coinciding with the rising edge of the 1x clock output
is the first bit of the word. Data is to be latched by the
receiver on both the rising and falling edges of the 6x
clock.
The ADS5240 provides internal references, or can
optionally be driven with external references. Best
performance can be achieved through the internal
reference mode.
The device is available in an HTQFP-64 PowerPAD
package and is specified over a -40°C to +85°C
operating range.
6X ADCLK
LCLK
P
LCLK
N
PLL
ADCLK
ADC LK
P
ADC LK
N
APPLICATIONS
Portable Ultrasound Systems
Tape Drives
Test Equipment
Optical Networking
1X ADCLK
DESCRIPTION
The ADS5240 is a high-performance, 4-channel,
40MSPS analog-to-digital converter (ADC). Internal
references are provided, simplifying system design
requirements. Low power consumption allows for the
highest of system integration densities. Serial LVDS
(low-voltage differential signaling) outputs reduce the
number of interface lines and package size.
RELATED PRODUCTS
MODEL
ADS5242
(1)
RESOLUTION
(BITS)
12
SAMPLE RATE
(MSPS)
65
CHANNELS
4
IN1
P
IN1
N
IN2
P
IN2
N
IN3
P
IN3
N
IN4
P
IN4
N
S/H
S/H
S/H
S/H
12− Bit
ADC
Serializer
OUT 1
P
OUT 1
N
OUT 2
P
OUT 2
N
OUT 3
P
OUT 3
N
OUT 4
P
OUT 4
N
12− Bit
ADC
Serializer
12− Bit
ADC
Serializer
12− Bit
ADC
Serializer
Reference
Registers
Control
(1) Available Q1 2005.
RESET
SCLK
SDATA
REF
T
V
C M
REF
B
CS
INT/EXT
PD
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated