Maximum Throughput Time(2)
Conversion Time
Convert Command(1)
Internal Clock
Status (EOC)
MBS
“0”
Bit 2
“1”
Bit 3
Bit 4
Bit 5
“1”
“0”
“0”
Bit 6
Bit 7
Bit 8
“1”
“1”
“1”
“0”
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
“1”
“1”
“0”
“1”
“0”
Bit 14
Bit 15
“0”
Bit 16
LSB
15
MSB
1
“1”
16
3
4
8
11
“1”
12
“0”
14
“0”
Serial Data Out
2
5
7
10
“1”
13
“1”
9
6
“1”
“1”
“1”
“1”
“1”
“0”
“1”
“0”
“0”
“0”
“0”
NOTES: (1) The convert command must be at least 50ns wide and must remain low during a conversion. The conversion is initiated
by the “trailing edge” of the convert command. (2) 57µs for 16 bits.
FIGURE 1. ADC71 Timing Diagram.
Bit 16
Valid
Serial
Out
40-125ns
40-125ns
Bit 16
Clock
Out
40-125ns
Status
FIGURE 2. Timing Relationship of Serial Data to Clock.
FIGURE 3. Timing Relationship of Valid Data to Status.
Binary (BIN)
Output
INPUT VOLTAGE RANGE AND LSB VALUES
Analog Input
Voltage Range
Defined As:
±10V
±5V
±2.5V
0 to +10V
CSB(3)
0 to +5V
CSB(3)
0 to +20V
CSB(3)
Code
Designation
COB(1)
or CTC(2)
COB(1)
or CTC(2)
COB(1)
or CTC(2)
One Least
Significant
Bit (LSB)
FSR
2n
n = 12
n = 13
n = 14
20V
2n
4.88mV
2.44mV
1.22mV
10V
2n
2.44mV
1.22mV
610µV
5V
2n
1.22mV
610µV
305µV
10V
2n
2.44mV
1.22mV
610µV
5V
2n
1.22mV
610µV
305µV
20V
2n
4.88mV
2.44mV
1.22mV
Transition Values
MSB LSB
000 ... 000(4)
011 ... 111
111 ... 110
+Full Scale
Mid Scale
–Full Scale
+10V–3/2LSB
0
–10V +1/2LSB
+5V–3/2LSB
0
–5V +1/2LSB
+2.5V–3/2LSB
0
–2.5V +1/2LSB
+10V–3/2LSB
+5V
0 +1/2LSB
+5V–3/2LSB
+2.5V
0 +1/2LSB
+20V–3/2LSB
+10V
0 +1/2LSB
NOTES: (1) COB = Complementary Offset Binary. (2) Complementary Two’s Complement—obtained by inverting the most significant bit MSB (pin 1). (3) CSB
= Complementary Straight Binary. (4) Voltages given are the nominal value for transition to the code specified.
TABLE I. Input Voltages, Transition Values, LSB Values, and Code Definitions.
®
ADC71
4