2Gb DDR2 - AS4C256M8D2
Simplified State Diagram
Initialization
Sequence
CKEL
OCD
Self
Refreshing
calibration
SRF
CKEH
PR
Idle
Setting
MRS
MRS
EMRS
REF
All banks
precharged
Refreshing
CKEL
CKEH
ACT
CKEL
Precharge
Power
Down
CKEL
CKEL
Activating
CKEL
Automatic Sequence
Command Sequence
Active
Power
Down
CKEH
CKEL
Write
Bank
Active
Read
Write
Read
WRA
RDA
Reading
Writing
Read
Write
RDA
WRA
RDA
PR, PRA
Writing
with
Autoprecharge
Reading
with
Autoprecharge
PR, PRA
PR, PRA
CKEL = CKE low, enter Power Down
CKEH = CKE high, exit Power Down, exit Self Refresh
ACT = Activate
Precharging
WR(A) = Write (with Autoprecharge)
RD(A) = Read (with Autoprecharge)
PR(A) = Precharge (All)
MRS = (Extended) Mode Register Set
SRF = Enter Self Refresh
REF = Refresh
Note: Use caution with this diagram. It is intended to provide a floorplan of the possible state transitions
and the commands to control them, not all details. In particular situations involving more than one bank,
enabling/disabling on-die termination, Power Down enty/exit - among other things - are not captured
in full detail.
Confidential
-5/70-
Rev.1.0 Sep. 2015
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
