VT82C686B
PINOUTS
Pin Diagram
Figure 2. VT82C686B Ball Diagram (Top View)
Key
A
1
2
3
4
5
6
7
8
9
10
CTS DCD TXD DCD
2# 2# 1#
DTR RXD RTS RXD
11
12
13
14
15
16
17
18
19
20
W
SMEM IOCH USB USB
KB WRT
DS
PD
7
PD
PIRQ AD
AD
28
AD
AD
ERR#
DATA#
R#
SMEM
W#
RDY P0+
P2+
DT PRT#
R
1#
DS
0#
1
2
PD
3
A#
31
26
AD
27
25
AD
24
W
USB USB USB
P0-
PD
0
PCI PIRQ AD
RST# D# 29
AEN
ACK#
BUSY
PE
B
C
D
E
F
DATA# GATE#
P2-
P3+
2#
2
1#
1
ROM IO
CS# W#
USB USB
CLK P1+
MS
DSK HD MTR
RI
2#
DSR CTS DSR
PD
4
P
AUTO PIRQ AD C/BE
ID
SEL
DT CHG# SEL#
MS DRV IN
CK DEN1 DEX#
1#
2#
1#
1#
INIT# FD#
C#
30
3#
IO DACK DRQ USB
R# 3# P1-
DACK DRQ
DRV TXD DTR
DEN0
IR
PD
5
PD
1
STR PIRQ AD
OBE# B#
AD
22
AD
21
DIR#
3
2
1#
RX
23
KB
CK
USB TRK
P3-
MTR RTS
0#
RI
1#
IR
TX
PD SLCT
IN#
P
CLK
AD
20
AD
19
AD
18
AD
17
RFSH# OSC
STEP#
SLCT
1#
1
00#
2#
6
MCS
S
IOCS IO
IRQ
7
AD C/BE
16
I
T
GND VCC
U
FRM#
GND VCC
VCC GND VCC VCC VCC GND
10 11 12 13 G14 GND
16# BHE# 16# CHK#
2#
RDY# RDY#
U
IRQ6 IRQ
SLPB
IRQ
4
IRQ DACK
3
DEV
SEL#
STOP# SERR# PAR CBE1#
G
H
J
GND
VCC
VCC
VCC
GND
VCC
VCC
GND
G7
H
J
8
9
5
2#
DRQ2 IRQ
SIRQ
B
CLK
AD
15
AD
14
AD
13
AD
12
AD
11
TC BALE
H
J
VCC
VCC
VCC
GND
VCC
VCC
9
RST
DRV
LA
23
LA
22
LA
21
LA
20
AD
10
AD
9
AD C/BE AD
8
GND GND GND GND
GND GND GND GND
GND GND GND GND
GND GND GND GND
0#
7
SA
19
SA
18
IRQ
10
IRQ IRQ
11 15
AD
6
AD
5
AD
4
AD
3
AD
2
K
L
M
N
P
K
L
K
L
IRQ DACK DRQ DACK SD
14 0# 5#
DRQ SD DACK SD DRQ
6# 10
SD DACK SD DRQ SD
13
AD
1
AD
0
PD
CS1#
PREQ#PGNT#
0
8
PD
DACK#
PD
CS3# A0
PD
PD
A2
PD
A1
M
N
M
N
5
9
6
PD PD
RDY IOR# IOW# DRQ
PD
PD
PDD
15
11
7#
12
7
SD
14
SD
15
SA
17
SA SA15
16
PDD PDD PDD PDD PDD
14 13
PDD PDD PDD PDD PDD
12 11 10
P7
8
9
10
11
12
13
P14 GND
VCC GND
SDD15
0
1
2
SA14 SA13 SA12 SA11 SA10
SDD14 SDD13 SDD12 SDD11 SDD10
VCC VCC
S
VCC GND
H
R
T
U
V
W
Y
GND VCC VCC
VCC
3
4
S
H
SA9 SA8 SA7 SA6
SDD9 SDD8 SDD7 SDD6
GPO SMB SUS THRM FAN
0
GPIO SDD10 PDD PDD PDD PDD PDD
A
XDIR INIT SLP#
VREF
DATA CLK PME#
1
JAB2
5
9
6
8
7
SA5 SA4 SA3 MEM
SDD5 SDD4 SDD3
R#
GPIO SMB
CLK
CPU SUS SUS
BAT FAN
V
JBX
SD
SD
SD
SD
A2
ACRS JBB2
SOE# SMI# NMI
RSM
LID
D
LOW#
RING#
IRQ8#
2
SENS1 GPI23
CS1# CS3# A0
SA2 SA1
SDD2 SDD1
SD MEM
5
PCI
STP# SENS2
V
GPIO JAX
C
V
SD
A1
SD
DACK#
SD
RDY
SYNC SDI
SPKR
FERR#
W#
RST#
RST# A#
ST1#
GPO23
JBY
SA0
SDD0
SD
2
SD
4
SD
7
RTC PWR STP
X2
SUS SMB
B# ALRT#
PCK
T
SD
SD
JAB1 JBB1 BTCK
INTR
GD CLK#
RUN# SENS1 SENS3 GPI22
JAY
SMI# BTN# STP# SENS2 SENS4 GPO22
IOR# IOW#
SD
0
SD
1
SD
3
SD
6
RTC
X1
A20 IGN SUS EXT PWR CPU
M# NE# C#
T
V
SD
DRQ
SDO SDI2 MSO MSI
VBAT
Note: Some of the pins above have alternate functions and alternate names. The table above contains only one name (usually the most often used function), but
the pin lists and pin descriptions contain all names.
Revision 1.71 June 9, 2000
-6-
Pinouts
ETC [ ETC ]
