Major Revisions in This Edition (2/2)
Page
Description
p. 393
p. 396
p. 401
18.4.7 SCK0/SCL/P27 pin output manipulation was modified
Figure 19-1. Serial Interface Channel 1 Block Diagram was modified
Caution was added in Figure 19-5. Automatic Data Transmit/Receive Interval Specify Register
Format
p. 429
p. 461
19.4.3 (3) (d) Busy control option, (e) Busy & strobe control option, and (f) Bit slippage detection
function of the former edition were changed to (4) Synchronization control and the description was
improved
20.4.2 (2) (d) Reception
The INTSR generation conditions at a receive error were modified
p. 462
p. 471
p. 545
Figure 20-10. Receive Error Timing was modified and note was added
20.4.4 Restrictions on using UART mode was added
APPENDIX A DIFFERENCES BETWEEN µPD78078, 78075B SUBSERIES AND µPD78070A was
added
p. 547 to 560
p. 561, 562
p. 569, 570
APPENDIX B DEVELOPMENT TOOLS
Revisions throughout: support of the in-circuit emulator IE-78K0-NS, etc.
APPENDIX C EMBEDDED SOFTWARE
Revisions throughout: fuzzy inference development support system was deleted, etc.
APPENDIX E REVISION HISTORY was added
The mark
shows major revised points.
7