LIST OF FIGURES (6/8)
Figure No.
Title
Page
18-15
18-16
18-17
18-18
18-19
18-20
18-21
18-22
Start Condition.......................................................................................................................... 372
Address ..................................................................................................................................... 372
Transfer Direction Specification .............................................................................................. 372
Acknowledge Signal ................................................................................................................. 373
Stop Condition .......................................................................................................................... 373
Wait Signal ............................................................................................................................... 374
Pin Configuration ...................................................................................................................... 379
Example of Communication from Master to Slave
(with 9-clock wait selected for both master and slave) .......................................................... 381
Example of Communication from Slave to Master
18-23
(with 9-clock wait selected for both master and slave) .......................................................... 384
Start Condition Output ............................................................................................................. 388
Slave Wait Release (Transmission) ........................................................................................ 389
Slave Wait Release (Reception) ............................................................................................. 390
SCK0/SCL/P27 Pin Configuration ........................................................................................... 393
SCK0/SCL/P27 Pin Configuration ........................................................................................... 394
Logic Circuit of SCL Signal...................................................................................................... 394
18-24
18-25
18-26
18-27
18-28
18-29
19-1
19-2
19-3
19-4
19-5
19-6
19-7
19-8
19-9
19-10
Serial Interface Channel 1 Block Diagram.............................................................................. 396
Timer Clock Select Register 3 Format .................................................................................... 398
Serial Operation Mode Register 1 Format .............................................................................. 399
Automatic Data Transmit/Receive Control Register Format .................................................. 400
Automatic Data Transmit/Receive Interval Specify Register Format .................................... 401
3-wire Serial I/O Mode Timings ............................................................................................... 407
Circuit of Switching in Transfer Bit Order ............................................................................... 408
Basic Transmission/Reception Mode Operation Timings ...................................................... 416
Basic Transmission/Reception Mode Flowchart ..................................................................... 417
Buffer RAM Operation in 6-byte Transmission/Reception
(in Basic Transmit/Receive Mode) .......................................................................................... 418
Basic Transmission Mode Operation Timings ........................................................................ 420
Basic Transmission Mode Flowchart ...................................................................................... 421
Buffer RAM Operation in 6-byte Transmission (in Basic Transmit Mode) ............................ 422
Repeat Transmission Mode Operation Timing ....................................................................... 424
Repeat Transmission Mode Flowchart.................................................................................... 425
Buffer RAM Operation in 6-byte Transmission (in Repeat Transmit Mode) ......................... 426
Automatic Transmission/Reception Suspension and Restart ................................................ 428
System Configuration when the Busy Control Option is Used .............................................. 429
Operation Timings when Using Busy Control Option (BUSY0 = 0) ...................................... 430
Busy Signal and Wait Cancel (when BUSY0 = 0).................................................................. 431
Operation Timings when Using Busy & Strobe Control Option (BUSY0 = 0)....................... 432
Operation Timing of the Bit Slippage Detection Function through the Busy Signal
19-11
19-12
19-13
19-14
19-15
19-16
19-17
19-18
19-19
19-20
19-21
19-22
(when BUSY0 = 1) ................................................................................................................... 433
Automatic Data Transmit/Receive Interval ............................................................................. 434
19-23
28
ETC [ ETC ]
