LIST OF FIGURES (7/8)
Figure No.
19-24
Title
Page
Operation Timing with Automatic Data Transmit/Receive Function
Performed by Internal Clock .................................................................................................... 435
20-1
20-2
20-3
20-4
20-5
20-6
20-7
20-8
Serial Interface Channel 2 Block Diagram.............................................................................. 438
Baud Rate Generator Block Diagram ..................................................................................... 439
Serial Operating Mode Register 2 Format .............................................................................. 441
Asynchronous Serial Interface Mode Register Format .......................................................... 442
Asynchronous Serial Interface Status Register Format ......................................................... 444
Baud Rate Generator Control Register Format ...................................................................... 445
Asynchronous Serial Interface Transmit/Receive Data Format............................................. 458
Asynchronous Serial Interface Transmission Completion Interrupt Request
Generation Timing .................................................................................................................... 460
Asynchronous Serial Interface Reception Completion Interrupt Request
20-9
Generation Timing .................................................................................................................... 461
Receive Error Timing ............................................................................................................... 462
State of Receive Buffer Register (RXB) when Receive Operation is Stopped and
20-10
20-11
Whether Interrupt Request (INTSR) is Generated or Not...................................................... 463
3-wire Serial I/O Mode Timing................................................................................................. 469
Circuit of Switching in Transfer Bit Order ............................................................................... 470
Receive Completion Interrupt Request Generation Timing (when ISRM = 1) ...................... 471
Period that Reading Receive Buffer Register is Prohibited ................................................... 472
20-12
20-13
20-14
20-15
21-1
21-2
21-3
21-4
21-5
Real-time Output Port Block Diagram ..................................................................................... 475
Real-time Output Buffer Register Configuration ..................................................................... 476
Port Mode Register 12 Format ................................................................................................ 477
Real-time Output Port Mode Register Format ........................................................................ 477
Real-time Output Port Control Register Format ..................................................................... 478
22-1
Basic Configuration of Interrupt Function ............................................................................... 482
Interrupt Request Flag Register Format ................................................................................. 485
Interrupt Mask Flag Register Format ...................................................................................... 486
Priority Specify Flag Register Format ..................................................................................... 487
External Interrupt Mode Register 0 Format ............................................................................ 488
External Interrupt Mode Register 1 Format ............................................................................ 489
Sampling Clock Select Register Format ................................................................................. 490
Noise Eliminator Input/Output Timing (during rising edge detection).................................... 491
Program Status Word Format.................................................................................................. 492
Flowchart from Non-maskable Interrupt Generation to Acknowledge................................... 494
Non-maskable Interrupt Request Acknowledge Timing ......................................................... 494
Non-maskable Interrupt Request Acknowledge Operation .................................................... 495
Interrupt Request Acknowledge Processing Algorithm .......................................................... 497
Interrupt Request Acknowledge Timing (Minimum Time) ...................................................... 498
Interrupt Request Acknowledge Timing (Maximum Time) ..................................................... 498
22-2
22-3
22-4
22-5
22-6
22-7
22-8
22-9
22-10
22-11
22-12
22-13
22-14
22-15
29
ETC [ ETC ]
