Ver 1.3
PRELIMINARY
EAGLE
3.24.6.3 Timer Counter / Output Period Register (TCNT0 / TCNT1 / TCNT2 / TCNT3)
Address : 0xFFE0_A008h / 0xFFE0_A108h / 0xFFE0_A208h / 0xFFE0_A308h
Bit
31 : 0
R/W
R/W
Description
Default Value
FFFF FFFFh
- Timer mode
Write : Timer Counter value setting
Read : Current up-counter value
- PWM mode
Write : PWM Period Value
Read : PWM Period Current up-counter value
3.24.6.4 Capture Counter / PWM Duty Compare Register (TDUT0 / TDUT1 / TDUT2 / TDUT3)
Address : 0xFFE0_A00Ch / 0xFFE0_A10Ch / 0xFFE0_A20Ch / 0xFFE0_A30Ch
Bit
R/W
Description
Default Value
31 : 0
R/W
- Capture mode
FFFF FFFFh
Read : Result value of counting at the sampling period
- PWM mode
Write : PWM Duty Value
Read : PWM Duty Value
3.24.6.5 Output Pulse Count Register (TPUL0 / TPUL1 / TPUL2 / TPUL3)
Address : 0xFFE0_A010h / 0xFFE0_A110h / 0xFFE0_A210h / 0xFFE0_A310h
Bit
R/W
Description
Default Value
31 : 0
R/W
- PWM mode
FFFF FFFFh
Write : PWM Pulse Number Value
Read : Current PWM Pulse Number
3.24.7 Interrupts
The Timer, PWM, Capture and Capture Overflow interrupt is present in each channel. They share one common interrupt
source. If an interrupt occurs during the capture mode, user should read the Control register to identify whether an overflow
condition has triggered that interrupt.
187
CONFIDENTIAL
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