Power Driver Integrated Full Digital Audio Amplifier
NTP-8230
Addr 0x27 : PWM Switching On/Off Control
Bit
7
6
5
4
3
2
1
0
Name
X
X
X
X
X
POF3
POF2
POF1
Name
POFn
Description
Switching output
On/off control
Value
b‟0
b’1
Meaning
Channel n PWM switching on
Channel n PWM switching off
Ref.
Addr 0x28 : PWM_MASK Control 0
Bit
7
6
5
4
3
2
1
0
Name
X
X
X
X
SRD
FPMLD
PWMM
Name
Description
Value
Meaning
Ref.
PWMM
PWM MASK
register
b’10
PWM MASK output is low. (reset default)
otherwise PWM MASK output is high.
FPMLD
SRD
Permanent
b’0
b‟1
No effect
Reset the
PWM_MASK
Low disable flag
FAULT disable
auto_PWM_MASK_restore_counter to 0
FAULT is effect for PROTECT
FAULT is ineffective for PROTECT
b’0
b‟1
Addr 0x29: PWM_MASK Control 1
Bit
7
6
5
4
3
2
1
0
Name
X
X
X
X
X
X
APM
POF
Name
POF
Description
PWM off flag
Value
b’0
Meaning
Ref.
Even if Auto PWM_MASK condition is
met, the PWM output of all channel is not
affected.
b‟1
When Auto PWM_MASK condition is met,
the PWM output of all channel goes to the
defined state which is set by the PWM off
state control register (Addr 0x1E).
Even if Auto PWM_MASK condition is
met, the PWM_MASK output of all
channel is not affected.
APM
PWM_MASK flag
b’0
b‟1
When Auto PWM_MASK condition is met,
the PWM_MASK output goes to Low
state.
Addr 0x2A : PWM_MASK Control 2
Bit
7
6
5
4
3
2
1
0
Name
VMSK3
VMSK2
VMSK1
VMSK0
PMSK3
PMSK2
PMSK1
PMSK0
Name
PMSK
Description
Masking bit of
PWM off control
Value
b’0
Meaning
Ref.
Mask bit indicating the validity of n-th bit of
Addr 0x5E system register: If the n-th bit
of this register is zero, the n-th bit of Addr
0x5E system register is invalid. The n-th
bit of Addr 0x5E is valid only when the n-th
mask bit is one.
b‟1
b’0
b‟1
VMSK
Masking bit of
PWM_MASK signal
Copyright ⓒ NeoFidelity, Inc.
Page 34
Document Number: DS8230 draft ver. 0.1
2011-01-11
ETC [ ETC ]
