Power Driver Integrated Full Digital Audio Amplifier
NTP-8230
of ch. n (n= 1,2)
On/off Bi-Quad 2
of ch. n (n= 1,2)
On/off Bi-Quad 3
of ch. n (n = 1,2)
On/off Bi-Quad 4
of ch. n (n = 1,2)
On/off Bi-Quad 5
of ch. n (n = 1,2)
b‟1
b’0
b‟1
b’0
b‟1
b’0
b‟1
b’0
b‟1
Enable Bi-Quad 1 of channel n
Bypass Bi-Quad 2 of channel n
Enable Bi-Quad 2 of channel n
Bypass Bi-Quad 3 of channel n
Enable Bi-Quad 3 of channel n
Bypass Bi-Quad 4 of channel n
Enable Bi-Quad 4 of channel n
Bypass Bi-Quad 5 of channel n
Enable Bi-Quad 5 of channel n
BQ2
BQ3
BQ4
BQ5
Addr 0x19~0x1A : Post Biquad Filter (PBQ) Configuration1 for Ch 1 and Ch 2, respectively
Bit
7
6
5
4
3
2
1
0
Name
X
X
BQ8
BQ7
BQ6
Name
BQ6
Description
On/off Bi-Quad 6
of ch. n (n = 1,2)
Value
b’00
b‟01
b‟10
b’00
b‟01
b‟10
b’00
b‟01
b‟10
Meaning
Bypass Bi-Quad 6 of channel n
Enable Bi-Quad 6 of channel n
Enable Bi-Quad 6 as Loudness Filter
Bypass Bi-Quad 7 of channel n
Enable Bi-Quad 7 of channel n
Enable Bi-Quad 7 as Loudness Filter
Bypass Bi-Quad 8 of channel n
Enable Bi-Quad 8 of channel n
Enable Bi-Quad 8 as Loudness Filter
Ref.
BQ7
BQ8
On/off Bi-Quad 7
of ch. n (n = 1,2)
On/off Bi-Quad 8
of ch. n (n = 1,2)
Addr 0x1B : Post Biquad Filter (PBQ) Configuration for Ch 3
Bit
7
6
5
4
3
2
1
0
Name
X
X
BQ3
BQ2
BQ1
Name
BQ1
Description
On/off Bi-Quad 1
of ch 3
Value
b’00
b‟01
b‟10
b’00
b‟01
b‟10
b’00
b‟01
b‟10
Meaning
Bypass Bi-Quad 1 of channel n
Enable Bi-Quad 1 of channel n
Enable Bi-Quad 1 as Loudness Filter
Bypass Bi-Quad 2 of channel n
Enable Bi-Quad 2 of channel n
Enable Bi-Quad 2 as Loudness Filter
Bypass Bi-Quad 3 of channel n
Enable Bi-Quad 3 of channel n
Enable Bi-Quad 3 as Loudness Filter
Ref.
BQ2
BQ3
On/off Bi-Quad 2
of ch 3
On/off Bi-Quad 3
of ch 3
Addr 0x1C: DRC Control 0
Bit
7
6
5
4
3
2
1
0
Name
CPR_L
CTS_L
Name
Description
Value
Meaning
Ref.
CTS_L
DRC threshold for
low band
b’0000000 -57 ~ 12dB unsigned 7-bit DRC threshold
~
for 1 band mode.
b‟1111111
In 2 band mode, it will control the
threshold of low band.
Refer to DRC threshold value table for
threshold values.
CPR_L
DRC enable for
b’0
Dynamic Range Compression off
Copyright ⓒ NeoFidelity, Inc.
Page 30
Document Number: DS8230 draft ver. 0.1
2011-01-11
ETC [ ETC ]
