Power Driver Integrated Full Digital Audio Amplifier
NTP-8230
14. APPENDIX
A. Configuration Register Summary
Addr 0x00: Audio Input Format
Bit
7
6
5
4
3
2
1
0
Name
X
X
X
FSM
INS
Name
INS
Description
Input format
Value
b’00
b‟01
Meaning
Ref.
I2S, slave mode
I2S, master mode
b‟10
General serial audio, slave mode
b‟11
General serial audio, master mode
FSM
Sampling
Frequency
in Master mode IIS
b‟000
b‟001
b‟010
b‟011
b‟100
b‟101
b‟110
b‟111
48 kHz
8 kHz
16 kHz
32 kHz
12 kHz
24 kHz
96 kHz
192 kHz
Addr 0x01: General Serial Audio Format
Bit
7
6
5
4
3
2
1
0
Name
X
X
BCKS
BS
MLF
LRJ
Name
LRJ
Description
Value
b’0
b‟1
b’0
b‟1
b’00
b‟01
b‟10
b‟11
Meaning
Left justify
Right justify
MSB first
LSB first
24 bit
20 bit
18 bit
16 bit
Ref.
Serial data justify
Serial bit order
Serial bit size
MLF
BS
BCKS
Bit clock size select b’00
64 BCK/WCK
48 BCK/WCK
32 BCK/WCK
b‟01
b‟10
Addr 0x02: Master Clock Frequency Control
Bit
7
6
5
4
3
2
1
0
Name
X
X
X
X
X
X
MCF
Name
MCF
Description
Master
Clock Frequency
Value
b’00
b‟01
b‟10
b‟11
Meaning
Ref.
12.288 MHz
24.576 MHz
18.432 MHz
User defined frequency. Required to set
address 0x63 and address 0x64 first
Copyright ⓒ NeoFidelity, Inc.
Page 27
2011-01-11
Document Number: DS8230 draft ver. 0.1