LH52256C/CH
CMOS 256K (32K × 8) Static RAM
DC ELECTRICAL CHARACTERISTICS (TA = 0°C to +70°C, VCC = 4.5 V to 5.5 V)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Input leakage
current
ILI
VIN = 0 V to VCC
–1.0
1.0
µA
Output leakage
current
CE = VIH or OE = VIH
VI/O = 0 V to VCC
ILO
ICC
–1.0
1.0
µA
Minimum cycle, VIN = VIL or VIH
II/O = 0 mA, CE = VIL
25
45.0
10.0
Operating supply
current
mA
tRC, tWC = 1 µs, VIN = VIL or VIH,
ICC1
I
I/O = 0 mA, CE = VIL
CE ≥ VCC – 0.2 V
CE = VIH
ISB
ISB1
VOL
VOH
0.6
40.0
3.0
µA
Standby current
Output voltage
mA
IOL = 2.1 mA
0.4
V
IOH = -1.0 mA
2.4
NOTE:
Typical values at VCC = 5.0 V, TA = 25°C
AC ELECTRICAL CHARACTERISTICS
AC Test Conditions
PARAMETER
MODE
NOTE
Input pulse level
0.6 V to 2.4 V
10 ns
Input rise and fall time
Input and output timing Ref. level
Output load
1.5 V
1 TTL + CL (100 pF)
1
NOTE:
1. Including scope and jig capacitance.
READ CYCLE (TA = 0°C to +70°C, VCC = 4.5 V to 5.5 V)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
ns
NOTE
Read cycle time
tRC
70
Address access time
tAA
70
70
35
ns
CE access time
tACE
tOE
ns
Output enable to output valid
Output hold from address change
CE Low to output active
OE Low to output active
CE High to output in High impedance
ns
tOH
10
10
ns
tLZ
ns
1
tOLZ
tHZ
5
0
0
ns
ns
ns
1
1
1
30
30
OE High to output in High impedance
tOHZ
NOTES:
1.
Active output to high-impedance and high-impedance to output active tests specified for a ±200 mV
transition from steady state levels into the test load.
4
ETC [ ETC ]
