LD7575
Revision History
Rev. Date
Change Notice
00
01
07/21/’05
07/28/’05
Original Specification.
1. Page 2, Remove the unexpected code “skype.lnk” before the “ordering information”.
2. Page 4, Recommended operating condition, change the “min. supply voltage Vcc”
from 10V to 11V since the UVLO range is from 9V to 11V.
3. Page 9, Add the gate resistor on figure 15 and figure 16 to avoid misunderstanding.
4. Page 11, Add the description “Figure 17 shows its operation.” In the section of “OVP
on Vcc”.
5. Page 13, Add “Vin=264Vac” on the title.
02
10/24/’05
1. Add DIP-8 Package
a. Page 1 --- modify the general description “The LD7575 is offered in both
SOP-8 and DIP-8 package.”.
b. Page 2 --- Add DIP-8 data on the “pin configuration” and “ordering
information”.
c. Page 4 --- Add DIP-8 data on the “absolute maximum rating”.
d. Page 15 --- Add DIP-8 package drawing
2. Add information of HV current limit resistor and gate-to-GND resistor
a. Page 1, 8 (figure13), 9 (figure15,16), 12, 13 --- Update the drawing, BOM and
schematics for such resistors.
b. Page 11, 12 --- Add the sections “Pull-Low Resistor on the Gate Pin of
MOSFET”, “Protection Resistor on the Hi-V Path” and figure 19~22.
c. Page 4 --- Add negative voltage limitation of HV pin on the “absolute maximum
rating”.
3. Correction on the block diagram
a. Page 3 --- Add flip-flop on the OVP loop to be matched with the OVP operation
and add the anti-floating resistor on the output.
4. Correction on the description of Over Load Protection (OLP)
a. Page 10 --- Original description “Whenever….30mS (when switching
frequency is 100KHz)”. Where the “100KHz” should be corrected to “65KHz”.
Continued…
17
Leadtrend Technology Corporation
LD7575-DS-04a January 2007
ETC [ ETC ]
