EM351 / EM357
Pin #
Signal
SC2SCLK
Direction
O
Description
SPI master clock of Serial Controller 2
Either disable timer output in TIM2_CCER,
or enable remap with TIM2_OR[7]
Enable master with SC2_SPICFG[4]
Select SPI with SC2_MODE
Select alternate output function with GPIO_PACFGL[11:8]
SPI slave clock of Serial Controller 2
Enable slave with SC2_SPICFG[4]
Select SPI with SC2_MODE
Digital I/O
SPI slave select of Serial Controller 2
Enable slave with SC2_SPICFG[4]
Select SPI with SC2_MODE
Synchronous CPU trace clock
Either disable timer output in TIM2_CCER,
or enable remap with TIM2_OR[5]
Enable trace interface in ARM core
Select alternate output function with GPIO_PACFGL[15:12]
Timer 2 channel 2 output
Disable remap with TIM2_OR[5]
Enable timer output in TIM2_CCER
Select alternate output function with GPIO_PACFGL[15:12]
Timer 2 channel 2 input
Disable remap with TIM2_OR[5]
Digital I/O
ADC Input 4
Select analog function with GPIO_PACFGH[3:0]
Frame signal of Packet Trace Interface (PTI)
Disable trace interface in ARM core
Enable PTI in Ember software
Select alternate output function with GPIO_PACFGH[3:0]
Synchronous CPU trace data bit 2
Select 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PACFGH[3:0]
Digital I/O
ADC Input 5
Select analog function with GPIO_PACFGH[7:4]
Data signal of Packet Trace Interface (PTI)
Disable trace interface in ARM core
Enable PTI in Ember software
Select alternate output function with GPIO_PACFGH[7:4]
Embedded serial bootloader activation out of reset
Signal is active during and immediately after a reset on nRESET. See
Section 6.2, Resets, in Chapter 6, System Modules for details.
SC2SCLK
I
25
PA3
SC2nSSEL
I/O
I
TRACECLK
(see also Pin 36)
O
TIM2C2
(see also Pin 31)
O
TIM2C2
(see also Pin 31)
I
I/O
Analog
O
26
PA4
ADC4
PTI_EN
TRACEDATA2
O
27
PA5
ADC5
PTI_DATA
I/O
Analog
O
nBOOTMODE
I
1-5
Preliminary
120-035X-000D
ETC [ ETC ]
