EM351 / EM357
Pin # Signal
TRACEDATA1
Direction
Description
O
Synchronous CPU trace data bit 1
Select 2- or 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[3:0]
41
42
43
PB7
I/O
High
current
Digital I/O
ADC2
Analog
ADC Input 2
Enable analog function with GPIO_PBCFGH[15:12]
IRQC1
I
Default external interrupt source C
TIM1C2
O
Timer 1 channel 2 output
Enable timer output in TIM1_CCER
Select alternate output function with GPIO_PBCFGH[15:12]
TIM1C2
PB6
I
Timer 1 channel 2 input
Cannot be remapped
I/O
High
current
Digital I/O
ADC1
Analog
ADC Input 1
Enable analog function with GPIO_PBCFGH[11:8]
IRQB
I
External interrupt source B
TIM1C1
O
Timer 1 channel 1 output
Enable timer output in TIM1_CCER
Select alternate output function with GPIO_PBCFGH[11:8]
TIM1C1
I
Timer 1 channel 1 input
Cannot be remapped
PB5
I/O
Digital I/O
ADC0
Analog
ADC Input 0
Enable analog function with GPIO_PBCFGH[7:4]
TIM2CLK
TIM1MSK
VDD_CORE
VDD_PRE
VDD_SYNTH
OSCB
I
Timer 2 external clock input
Timer 1 external clock mask input
1.25 V digital core supply decoupling
1.8 V prescaler supply
I
44
45
46
47
Power
Power
Power
I/O
1.8 V synthesizer supply
24 MHz crystal oscillator or left open when using external clock input on
OSCA
48
49
OSCA
GND
I/O
24 MHz crystal oscillator or external clock input
Ground
Ground supply pad in the bottom center of the package forms Pin 49.
See Ember’s various EM35x Reference Design documentation for PCB
considerations.
1IRQC and IRQD external interrupts can be mapped to any digital I/O pin using the GPIO_IRQSEL and GPIO_IRQDSEL registers.
1-9
120-035X-000D
Preliminary
ETC [ ETC ]
