DM9000A
Ethernet Controller with General Processor Interface
1. General Description
The DM9000A is a fully integrated and cost-effective
low pin count single chip Fast Ethernet controller with
a general processor interface, a 10/100M PHY and
4K Dword SRAM. It is designed with low power and
high performance process that support 3.3V with 5V
IO tolerance.
The DM9000A supports 8-bit and 16-bit data
interfaces to internal memory accesses for various
processors. The PHY of the DM9000A can interface to the
UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with
AUTO-MDIX. It is fully compliant with the IEEE 802.3u
Spec. Its auto-negotiation function will automatically
configure the DM9000A to take the maximum advantage of
its abilities. The DM9000A also supports IEEE 802.3x full-
duplex flow control..
2. Block Diagram
LED
EEPROM
Interface
PHYceiver
100 Base-TX
transceiver
TX+/-
AUTO-MDIX
RX+/-
10 Base-T
Tx/Rx
100 Base-TX
PCS
MII
MAC
TX Machine
Control
&Status
Registers
Memory
Management
RX Machine
Internal
SRAM
Autonegotiation
MII Management
Control
& MII Register
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
Processor
Interface
6