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DM9000AEP 参数 Datasheet PDF下载

DM9000AEP图片预览
型号: DM9000AEP
PDF下载: 下载PDF文件 查看货源
内容描述: 以太网控制器与通用处理器接口 [Ethernet Controller with General Processor Interface]
分类和应用: 控制器以太网
文件页数/大小: 56 页 / 1723 K
品牌: ETC [ ETC ]
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DM9000A
Ethernet Controller with General Processor Interface
5. Pin Description
I = Input
# = asserted low
5.1 Processor Interface
Pin No.
35
Pin Name
IOR#
Type
I,PD
Description
Processor Read Command
This pin is low active at default, its polarity can be modified by EEPROM setting.
See the EEPROM content description for detail
Processor Write Command
This pin is low active at default, its polarity can be modified by EEPROM setting.
See the EEPROM content description for detail
Chip Select
A default low active signal used to select the DM9000A. Its polarity can be
modified by EEPROM setting. See the EEPROM content description for detail.
O = Output
I/O = Input/Output
O/D = Open Drain
P = Power
PD = internal pull-low about 60K
36
IOW#
I,PD
37
CS#
I,PD
32
CMD
34
18,17,16,1
4,13,12,11
,10
31,29,28,2
7,26,25,24
,22
INT
Command Type
I,PD When high, the access of this command cycle is DATA port
When low, the access of this command cycle is INDEX port
Interrupt Request
This pin is high active at default, its polarity can be modified by EEPROM
O,PD
setting or by strap pin EECK. See the EEPROM content description for
detail
Processor Data Bus bit 0~7
I/O,PD
Processor Data Bus bit 8~15
In 16-bit mode, these pins act as the processor data bus bit 8~15;
I/O,PD
When EECS pin is pulled high , they have other definitions. See 8-bit mode pin
description for details.
SD0~7
SD8~15
5.1.1 8-bit mode pins
Pin No.
Pin Name
Type
Description
22
WAKE
24
LED3
25,26,27
GP6~4
O,PD Issue a wake up signal when wake up event happens
Full-duplex LED
In LED mode 1, Its low output indicates that the internal PHY is operated
in full-duplex mode, or it is floating for the half-duplex mode of the
O,PD internal PHY
In LED mode 0, Its low output indicates that the internal PHY is operated
in 10M mode, or it is floating for the 100M mode of the internal PHY
Note: LED mode is defined in EEPROM setting.
General Purpose output pins:
These pins are output only for general purpose that are configured by
register 1Fh.
O,PD
GP6 pin also act as trap pin for the INT output type.
When GP6 is pulled high, the INT is Open-Drain output type;
Otherwise it is force output type.
10
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005