ADM7008
Function Description
Hardware reset operation samples the pins and initializes all registers to their default
values. This process includes re-evaluation of all hardware configurable registers. A
hardware reset affects all the eight PHYs in the device.
A software reset can reset an individual PHY and it does not latch the external pins nor
reset the registers to their respective default value.
Logic levels on several I/O pins are detected during a hardware reset to determine the
initial functionality of ADM7008. Some of these pins are used as output ports after reset
operation.
Care must be taken to ensure that the configuration setup will not interfere with normal
operation. Dedicated configuration pins can be tied to VCC or Ground directly.
Configuration pins multiplexed with logic level output functions should be either weakly
pulled up or weakly pulled down through resistors. Configuration pins multiplexed with
LED outputs should be set up with one of the following circuits shown in Figure 3-24.
3.5 Power Management
There are two types of power saving mode provided by ADM7008: Receive Power
Saving (So Called Medium Detect Power Saving) and Transmit Power Saving Mode (So
Called Low Power Link Pulse power saving mode).
3.5.1 Medium Detect Power Saving
An analog block is designed for carrier sense detecting. When there is no carrier sense
presented on medium (cable not attached), then “SIGNAL DETECT” will not be ON.
Whenever cable is attached to ADM7008 and the voltage threshold is above +/- 50mV,
then SD will be asserted HIGH to indicate that there is cable attached to ADM7008. All
internal blocks except Management block will be disabled (reset) before SD is asserted.
When SD is asserted, internal Auto Negotiation block will be turned on and the 10M
transmit driver will also be turned on for auto negotiation process. Auto negotiation will
issue control signals to control 10M receive and 100M A/D block according to different
state in arbitration block diagram. During auto negotiation, all digital blocks except
management and link monitor blocks will be disabled to reduce power consumption.
Whenever operating speed is determined (Either auto negotiation is On or Off), the non-
active speed relative circuit will be disabled all the time to save more power. For
example, when corresponding port is operating on 10M, then 100M relative blocks will
be disabled and 10M relative blocks will be disabled whenever corresponding port is in
100M mode. Auto negotiation block will be reset when SD signal goes from high to low.
See Figure 3-25 for the state diagram for this algorithm.
ADMtek Inc.
3-26
ETC [ ETC ]
